公开(公告)号：US11860797B2

公开(公告)日：2024-01-02

申请号：US17565666

申请日：2021-12-30

申请人： ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

发明人： Philip Ng ,  Nippon Raval ,  David A. Kaplan ,  Donald P. Matthews, Jr.

IPC分类号： G06F13/10 ,  G06F12/084 ,  G06F12/1081

CPC分类号： G06F13/102 ,  G06F12/084 ,  G06F12/1081 ,  G06F2212/603

摘要： Restricting peripheral device protocols in confidential compute architectures, the method including: receiving a first address translation request from a peripheral device supporting a first protocol, wherein the first protocol supports cache coherency between the peripheral device and a processor cache; determining that a confidential compute architecture is enabled; and providing, in response to the first address translation request, a response including an indication to the peripheral device to not use the first protocol.

公开(公告)号：US11836525B2

公开(公告)日：2023-12-05

申请号：US17125377

申请日：2020-12-17

申请人： Red Hat, Inc.

发明人： Orit Wasserman ,  Marcel Apfelbaum

IPC分类号： G06F9/50 ,  G06F9/48 ,  G06F12/0811 ,  G06F12/0871

CPC分类号： G06F9/5016 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/505 ,  G06F9/5044 ,  G06F12/0811 ,  G06F12/0871 ,  G06F2209/508 ,  G06F2209/5014 ,  G06F2212/603

摘要： A system includes a memory, a processor in communication with the memory, and an operating system (“OS”) executing on the processor. The processor belongs to a processor socket. The OS is configured to pin a workload of a plurality of workloads to the processor belonging to the processor socket. Each respective processor belonging to the processor socket shares a common last-level cache (“LLC”). The OS is also configured to measure an LLC occupancy for the workload, reserve the LLC occupancy for the workload thereby isolating the workload from other respective workloads of the plurality of workloads sharing the processor socket, and maintain isolation by monitoring the LLC occupancy for the workload.

公开(公告)号：US20180232312A1

公开(公告)日：2018-08-16

申请号：US15885882

申请日：2018-02-01

申请人： FUJITSU LIMITED

发明人： Hidekazu KAWANO ,  Hiroaki Konno ,  Takeshi Ueda ,  Hiroshi Koarashi ,  Hiroshi CHIBA ,  Hitomi Akiyama ,  Kenji Higuchi ,  REISUKE NAKAGAWA

IPC分类号： G06F12/0868 ,  G06F12/0875 ,  G06F3/06 ,  G06F12/0831

CPC分类号： G06F12/0868 ,  G06F3/0634 ,  G06F3/065 ,  G06F3/0653 ,  G06F3/0655 ,  G06F3/0685 ,  G06F3/0689 ,  G06F11/00 ,  G06F12/0831 ,  G06F12/0875 ,  G06F2212/283 ,  G06F2212/453 ,  G06F2212/603 ,  G06F2212/604 ,  G06F2212/621

摘要： A control device includes a first and a second control devices, the first control device is configured to transmit second data to the second control device at a first time, receive a first notification from the second control device at a second time, transmit the second data to a storage device at a third time, receive a second notification from the storage device at a fourth time, select a first or a second mode based on a comparison of the first period from the first time to the second time and the second period from the third time to the fourth time, in the first mode, transmit the first data to the second control device and the storage device, receive the first notification, transmit a processing completion notification, in the second mode, transmit the first data to the storage device, receive the second notification, transmit the processing completion notification.

公开(公告)号：US09916179B2

公开(公告)日：2018-03-13

申请号：US14926026

申请日：2015-10-29

申请人： International Business Machines Corporation

发明人： Michael Karl Gschwind ,  Maged M. Michael ,  Valentina Salapura ,  Eric M. Schwarz ,  Chung-Lung K. Shum ,  Timothy J. Slegel

IPC分类号： G06F9/46 ,  G06F9/54 ,  G06F12/0842 ,  G06F13/28

CPC分类号： G06F9/467 ,  G06F9/542 ,  G06F12/0833 ,  G06F12/0837 ,  G06F12/0842 ,  G06F12/123 ,  G06F13/28 ,  G06F2212/1008 ,  G06F2212/1016 ,  G06F2212/603

摘要： In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes, by the first processor, initializing a time record, listening for zero or more probes from the one more additional processors, responding to each probe of the zero or more probes, and logging each probe of the zero or more probes to yield a probe log. The computer-implemented method further includes, by the first processor, receiving a probe report directive and, responsive to the probe report directive, generating a probe report indication based on the probe log. The probe report indication denotes whether, since the time record, the first processor has received any of the zero or more probes. The computer-implemented method further includes ending the time record. A corresponding computer program product and computer system are also disclosed.

公开(公告)号：US09529727B2

公开(公告)日：2016-12-27

申请号：US14287331

申请日：2014-05-27

申请人： QUALCOMM Incorporated

发明人： Suresh Kumar Venkumahanti ,  Stephen Robert Shannon

IPC分类号： G06F12/00 ,  G06F12/08 ,  G06F9/38 ,  G06F9/30

CPC分类号： G06F12/0884 ,  G06F9/30189 ,  G06F9/3802 ,  G06F9/3824 ,  G06F9/3851 ,  G06F12/0811 ,  G06F12/0846 ,  G06F12/0855 ,  G06F12/0857 ,  G06F12/0864 ,  G06F12/0877 ,  G06F2212/1028 ,  G06F2212/283 ,  G06F2212/6012 ,  G06F2212/603 ,  Y02D10/13

摘要： A particular method includes selecting between a first cache access mode and a second cache access mode based on a number of instructions stored at an issue queue, a number of active threads of an execution unit, or both. The method further includes performing a first cache access. When the first cache access mode is selected, performing the first cache access includes performing a tag access and performing a data array access after performing the tag access. When the second cache access mode is selected, performing the first cache access includes performing the tag access in parallel with the data array access.

摘要翻译： 一种特定的方法包括基于存储在发布队列中的指令数量，执行单元的活动线程数量，或两者来选择第一高速缓存访​​问模式和第二高速缓存访​​问模式。 该方法还包括执行第一高速缓存访​​问。 当选择第一高速缓存访​​问模式时，执行第一高速缓存访​​问包括在执行标签访问之后执行标签访问并执行数据阵列访问。 当选择第二高速缓存访​​问模式时，执行第一高速缓存访​​问包括与数据阵列访问并行地执行标签访问。

公开(公告)号：US20160283394A1

公开(公告)日：2016-09-29

申请号：US14670574

申请日：2015-03-27

申请人： Sudip Chahal ,  Husni Bahra ,  Nigel Wayman ,  Terry Yoshii ,  Charles Lockwood ,  Shane Healy

发明人： Sudip Chahal ,  Husni Bahra ,  Nigel Wayman ,  Terry Yoshii ,  Charles Lockwood ,  Shane Healy

IPC分类号： G06F12/08 ,  G06F3/06

CPC分类号： G06F12/0897 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/0649 ,  G06F3/0671 ,  G06F3/0683 ,  G06F3/0685 ,  G06F12/0871 ,  G06F2212/603 ,  G06F2212/604

摘要： Various systems and methods for caching and tiering in cloud storage are described herein. A system for managing storage allocation comprises a storage device management system to maintain an access history of a plurality of storage blocks of solid state drives (SSDs) managed by the storage device management system; and automatically configure each of a plurality of storage blocks to operate in cache mode or tier mode, wherein a ratio of storage blocks operating in cache mode and storage blocks operating in tier mode is based on the access history.

摘要翻译： 这里描述了云存储中的缓存和分层的各种系统和方法。 一种用于管理存储分配的系统包括：存储设备管理系统，用于维护由存储设备管理系统管理的固态驱动器（SSD）的多个存储块的访问历史; 并且自动配置多个存储块中的每一个以高速缓存模式或层模式进行操作，其中以高速缓存模式操作的存储块和以层模式操作的存储块的比率基于访问历史。

公开(公告)号：US20160283385A1

公开(公告)日：2016-09-29

申请号：US14671871

申请日：2015-03-27

申请人： James A. Boyd ,  Sanjeev N. Trika ,  Dale J. Juenemann

发明人： James A. Boyd ,  Sanjeev N. Trika ,  Dale J. Juenemann

IPC分类号： G06F12/08 ,  G06F12/02

CPC分类号： G06F12/0868 ,  G06F9/4411 ,  G06F12/0804 ,  G06F2212/1016 ,  G06F2212/205 ,  G06F2212/222 ,  G06F2212/603 ,  Y02D10/13

摘要： A method is described that includes performing the following by a device driver of a non volatile storage device: caching information targeted for the storage device into a non volatile region of a system memory without writing the information through into the storage device.

摘要翻译： 描述了一种方法，其包括由非易失性存储设备的设备驱动程序执行以下操作：将存储设备所针对的信息缓存到系统存储器的非易失性区域中，而不将信息写入存储设备。

公开(公告)号：US09436608B1

公开(公告)日：2016-09-06

申请号：US14620240

申请日：2015-02-12

申请人： International Business Machines Corporation

发明人： Ansu A. Abraham ,  Daniel V. Rosa ,  Donald W. Schmidt

IPC分类号： G06F12/08

CPC分类号： G06F12/0842 ,  G06F9/4881 ,  G06F12/0868 ,  G06F2209/485 ,  G06F2212/1016 ,  G06F2212/313 ,  G06F2212/603

摘要： Embodiments of the disclosure relate to optimizing a memory nest for a workload. Aspects include an operating system determining the cache/memory footprint of each work unit of the workload and assigning a time slice to each work unit of the workload based on the cache/memory footprint of each work unit. Aspects further include executing the workload on a processor by providing each work unit access to the processor for the time slice assigned to each work unit.

摘要翻译： 本公开的实施例涉及优化用于工作负载的存储器套。 方面包括确定工作负载的每个工作单元的高速缓存/存储器占用面积的操作系统，并且基于每个工作单元的高速缓存/存储器占用面积，为工作负载的每个工作单元分配时间片。 方面还包括通过为分配给每个工作单元的时间片提供每个工作单元对处理器的访问来在处理器上执行工作量。

公开(公告)号：US20160154867A1

公开(公告)日：2016-06-02

申请号：US14906003

申请日：2013-07-31

申请人： HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

发明人： Qiming Chen ,  Meichun Hsu

IPC分类号： G06F17/30 ,  G06F9/48 ,  G06F12/08

CPC分类号： G06F16/258 ,  G06F9/4843 ,  G06F9/4881 ,  G06F12/0813 ,  G06F16/24568 ,  G06F16/955 ,  G06F2209/5017 ,  G06F2212/603

摘要： A method for processing a data stream may comprise retrieving a first window from a distributed cache platform based on a first window key, executing a first task and a second task in parallel on a processor resource, and merging a first result and a second result into a stream result based on a relationship between a first task key and a second task key.

摘要翻译： 用于处理数据流的方法可以包括基于第一窗口密钥从分布式高速缓存平台检索第一窗口，在处理器资源上并行执行第一任务和第二任务，并将第一结果和第二结果合并成 基于第一任务键和第二任务键之间的关系的流结果。

公开(公告)号：US20160147597A1

公开(公告)日：2016-05-26

申请号：US14824264

申请日：2015-08-12

申请人： International Business Machines Corporation

发明人： Michael F. Fee ,  Pak-kin Mak ,  Arthur J. O'Neill, JR. ,  Deanna Postles Dunn Berger

IPC分类号： G06F11/10 ,  G06F12/08

CPC分类号： G06F11/1064 ,  G06F12/0848 ,  G06F12/0862 ,  G06F12/0864 ,  G06F12/0888 ,  G06F2212/1032 ,  G06F2212/282 ,  G06F2212/602 ,  G06F2212/603 ,  G06F2212/6032 ,  G06F2212/6046

摘要： An aspect includes receiving a fetch request for a data block at a cache memory system that includes cache memory that is partitioned into a plurality of cache data ways including a cache data way that contains the data block. The data block is fetched and it is determined whether the in-line ECC checking and correcting should be bypassed. The determining is based on a bypass indicator corresponding to the cache data way. Based on determining that in-line ECC checking and correcting should be bypassed, returning the fetched data block to the requestor and performing an ECC process for the fetched data block subsequent to returning the fetched data block to the requestor. Based on determining that in-line ECC checking and correcting should not be bypassed, performing the ECC process for the fetched data block and returning the fetched data block to the requestor subsequent to performing the ECC process.

摘要翻译： 一个方面包括在高速缓存存储器系统处接收对数据块的提取请求，该高速缓冲存储器系统包括高速缓存存储器，该高速缓冲存储器被分割成包括包含数据块的高速缓存数据方式的多个高速缓存数据路径。 取出数据块，确定是否应绕过在线ECC检查和校正。 该确定是基于对应于缓存数据方式的旁路指示器。 基于确定旁路ECC检查和纠正，在将获取的数据块返回给请求者之后，将获取的数据块返回给请求者并对所取出的数据块执行ECC处理。 基于确定不应该旁路在线ECC检查和校正，对所获取的数据块执行ECC处理，并且在执行ECC处理之后将获取的数据块返回给请求者。