SEMICONDUCTOR DEVICE AND POWER CONVERTER

    公开(公告)号:US20230070214A1

    公开(公告)日:2023-03-09

    申请号:US17795536

    申请日:2020-03-13

    Abstract: A semiconductor device includes: a semiconductor element, a first lead frame, a second lead frame, and a thermally conductive member; and a sealing member sealing them. The first lead frame includes: a first portion exposed from a first side surface of the sealing member; and a second portion located closer to a lower surface of the sealing member than the first portion in a second direction crossing the lower surface. The semiconductor device further includes an intermediate frame which is located between the second portion and the fifth portion at least in the second direction. A distance, in the first direction, between the second portion and the intermediate frame is shorter than a distance, in the second direction, between an upper surface of the first portion and the upper surface of the second portion.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND POWER CONVERSION DEVICE

    公开(公告)号:US20220020672A1

    公开(公告)日:2022-01-20

    申请号:US17294685

    申请日:2019-02-01

    Abstract: A semiconductor device includes a heat sink, an insulating layer, a lead frame, a power semiconductor element, a sealing resin, and fins. The heat sink has a first main surface and a second main surface opposed to each other. A lead frame including a lead terminal is disposed on the first main surface of the heat sink with the insulating layer interposed. The power semiconductor element is mounted on the lead frame. The sealing resin is formed to cover an inside region located inside of an outer peripheral region located around the entire periphery along the outer periphery of the first main surface of the heat sink. A first depression is formed along the sealing resin in the outer peripheral region of the first main surface.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE

    公开(公告)号:US20200176361A1

    公开(公告)日:2020-06-04

    申请号:US16623402

    申请日:2018-01-23

    Abstract: A semiconductor device and a semiconductor module which can be reduced in size while ensuing insulation are provided. In the semiconductor device, a lead frame on which a circuit pattern is formed is provided on an insulation substrate; the circuit pattern of the lead frame is joined to the back-side electrode of a semiconductor chip via a solder layer, and the lead frame is electrically connected with the top-side electrode of the semiconductor chip via a wire; the lead frame 1 includes a terminal inside a mold-sealing resin and a terminal exposed to a space outside the mold-sealing resin, and the terminal is connected to a terminal block via a solder layer; and the lead frame, the insulation substrate, the semiconductor chip and the terminal block are integrally molded and sealed by the mold-sealing resin.

    SEMICONDUCTOR DEVICE AND POWER CONVERTER
    7.
    发明公开

    公开(公告)号:US20240222233A1

    公开(公告)日:2024-07-04

    申请号:US18288999

    申请日:2021-05-11

    CPC classification number: H01L23/49562 H01L23/3121 H01L23/32 H01L23/49531

    Abstract: A semiconductor device (100) includes a lead frame (20) having a mount surface (20a), a semiconductor element (30) disposed on the mount surface, a circuit board (50) disposed apart from the mount surface in a thickness direction of the semiconductor device and electrically connected to the lead frame, a sealing resin (70) that seals the lead frame, the semiconductor element, and the circuit board, and a connector (80). The lead frame has a lead (22) exposed from the sealing resin. The circuit board has at least one exposed portion (52) exposed from the sealing resin. A connector is electrically connected to one of the at least one exposed portion.

    SEMICONDUCTOR DEVICE AND POWER CONVERTER
    9.
    发明申请

    公开(公告)号:US20200335411A1

    公开(公告)日:2020-10-22

    申请号:US16960756

    申请日:2018-12-03

    Abstract: A semiconductor device includes: a circuit member including a planar portion; a terminal portion formed above the front surface of the planar portion of the circuit member and parallel to the planar portion; a semiconductor element which has an upper surface located below an upper surface of the terminal portion and is formed on the front surface of the planar portion of the circuit member; a resin layer arranged on the semiconductor element and having first openings through which the semiconductor element is exposed; a conductive layer arranged on the resin layer, including an upper surface located above the upper surface of the terminal portion, and joined to the semiconductor element through the first openings; and a sealing member including an upper surface parallel to the planar portion and integrally sealing the circuit member, the semiconductor element, the resin layer, the conductive layer, and part of the terminal portion.

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