公开(公告)号：US4164436A

公开(公告)日：1979-08-14

申请号：US925792

申请日：1978-07-18

申请人： Mitsuru Ura ,  Kenji Miyata ,  Takaya Suzuki ,  Takuzo Ogawa

发明人： Mitsuru Ura ,  Kenji Miyata ,  Takaya Suzuki ,  Takuzo Ogawa

IPC分类号： H01L21/22 ,  H01L21/205 ,  H01L21/225 ,  H01L29/04 ,  H01L29/08 ,  H01L29/866

CPC分类号： H01L29/866 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/2257 ,  H01L29/04 ,  H01L29/0834 ,  Y10S148/122 ,  Y10S438/983

摘要： A semiconductor substrate having a single crystal semiconductor layer of one conductivity type exposed to the surface thereof is maintained at a temperature lower than the temperature at which the semiconductors is precipitated from the gas phase. In this state, a gas of a starting material of a semiconductor, a gas containing impurities capable of forming a semiconductor of the other conductivity type and a carrier gas therefore are fed onto the semiconductor substrate. Then, the semiconductor substrate is heated to form an amorphous or polycrystalline semiconductor layer of the other conductivity type on the semiconductor substrate. Simultaneously, the impurities of the other conductivity type are diffused from the amorphous or polycrystal semiconductor layer into the substrate which has a single crystal semiconductor layer of one conductivity type, to form a single crystal semiconductor layer having a p-n junction just below the amorphous or polycrystal semiconductor layer between the amorphous or polycrystalline semiconductor layer and the single crystal semiconductor layer of one conductivity type.In a p-n junction to be formed according to this process, the distribution of the concentration of impurities can be controlled precisely, and the step-like distribution of the concentration of impurities can be attained very well.

摘要翻译： 具有暴露于其表面的一种导电类型的单晶半导体层的半导体衬底保持在比从气相中半导体析出的温度低的温度。 在这种状态下，半导体衬底上的半导体原料气体，含能够形成其它导电类型的半导体的气体和载气的气体被馈送到半导体衬底上。 然后，半导体衬底被加热以在半导体衬底上形成另一导电类型的非晶或多晶半导体层。 同时，其他导电类型的杂质从非晶或多晶半导体层扩散到具有一种导电类型的单晶半导体层的衬底中，以形成具有刚好在无定形或多晶的下面的pn结的单晶半导体层 非晶或多晶半导体层与一种导电类型的单晶半导体层之间的半导体层。

公开(公告)号：US4100310A

公开(公告)日：1978-07-11

申请号：US648943

申请日：1976-01-14

申请人： Mitsuru Ura ,  Takuzo Ogawa ,  Takaya Suzuki ,  Yosuke Inoue ,  Masayoshi Nomura

发明人： Mitsuru Ura ,  Takuzo Ogawa ,  Takaya Suzuki ,  Yosuke Inoue ,  Masayoshi Nomura

IPC分类号： C30B31/18 ,  H01L21/00 ,  H01L21/205 ,  H01L21/22 ,  H01L21/223 ,  H01L21/31 ,  H01L21/316 ,  B05D5/12

CPC分类号： H01L21/31625 ,  C30B31/18 ,  H01L21/00 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  Y10S118/90 ,  Y10S148/006 ,  Y10S148/043 ,  Y10S148/057

摘要： In a method of doping impurities comprising mixing a carrier gas, a semiconductor compound gas and a doping gas and leading the mixed gas to a reaction chamber to form a semiconductor layer or a semiconductor oxide layer doped with impurities on a substrate inside the chamber, a part of the doping gas before mixing the doping gas with the other gases is taken and led to a gas analyzer and impurity concentration in the doping gas is monitored to control the impurity concentration in the doping gas.

摘要翻译： 在掺杂杂质的方法中，包括混合载气，半导体化合物气体和掺杂气体，并将混合气体导引到反应室，以形成在腔室内的衬底上掺杂有杂质的半导体层或半导体氧化物层， 将掺杂气体与其他气体混合之前的一部分掺杂气体被引导到气体分析器，并且监测掺杂气体中的杂质浓度以控制掺杂气体中的杂质浓度。

公开(公告)号：US4200877A

公开(公告)日：1980-04-29

申请号：US860118

申请日：1977-12-13

申请人： Takaya Suzuki ,  Mitsuru Ura ,  Takuzo Ogawa

发明人： Takaya Suzuki ,  Mitsuru Ura ,  Takuzo Ogawa

IPC分类号： H01L29/864 ,  H01L29/04 ,  H01L29/866 ,  H01L29/90

CPC分类号： H01L29/866 ,  H01L29/04 ,  H01L29/861

摘要： Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5.times.10.sup.18 atoms/cm.sup.3.

摘要翻译： 公开了一种温度补偿电压参考二极管，其包括用于建立齐纳击穿电压的击穿PN结，用于温度补偿的PN结具有与击穿PN结相反的温度系数，击穿PN结和温度补偿PN 其中所述PN结以彼此反向串联连接的这些PN结一体地形成在半导体衬底中，以及插入在击穿PN结和温度补偿PN结之间的半导体区域，用于基本上防止晶体管的作用在 各个PN结，其中半导体区域由多晶半导体层和杂质浓度高于约5×1018原子/ cm3的单晶半导体层中的至少一个形成。

公开(公告)号：US4954855A

公开(公告)日：1990-09-04

申请号：US113360

申请日：1987-10-28

申请人： Akio Mimura ,  Yoshikazu Hosokawa ,  Takaya Suzuki ,  Takashi Aoyama ,  Nobutake Konishi ,  Yutaka Misawa ,  Kenji Miyata

发明人： Akio Mimura ,  Yoshikazu Hosokawa ,  Takaya Suzuki ,  Takashi Aoyama ,  Nobutake Konishi ,  Yutaka Misawa ,  Kenji Miyata

IPC分类号： H01L21/336 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L29/456 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7866 ,  H01L29/78675

摘要： A thin film transistor formed on an insulating sulstrate is disclosed in which metal silicide layers are formed in a thin film made of a monocrystalline, polycrystalline, or amorphous semiconductor material, to be used as source and drain regions, and further a gate electrode includes a metal silicide layer.

摘要翻译： 公开了一种形成在绝缘硅片上的薄膜晶体管，其中金属硅化物层形成在由单晶，多晶或非晶半导体材料制成的薄膜中，用作源极和漏极区域，并且还包括一个栅电极 金属硅化物层。

公开(公告)号：US4746961A

公开(公告)日：1988-05-24

申请号：US59785

申请日：1987-06-08

申请人： Nobutake Konishi ,  Kenji Miyata ,  Yoshikazu Hosokawa ,  Takaya Suzuki ,  Akio Mimura

发明人： Nobutake Konishi ,  Kenji Miyata ,  Yoshikazu Hosokawa ,  Takaya Suzuki ,  Akio Mimura

IPC分类号： H01L27/12 ,  G02F1/1368 ,  H01L29/08 ,  H01L29/78 ,  H01L29/786 ,  H01L29/161 ,  H01L29/12

CPC分类号： G02F1/1368 ,  H01L29/0847 ,  H01L29/78621 ,  H01L2029/7863

摘要： This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of an active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region and the drain region is of multi-layered structure, in which high impurity concentration portions and low impurity concentration portions are alternately superposed on each other.

摘要翻译： 本发明涉及适用于有源矩阵方案的液晶显示的场效应晶体管的结构，并且公开了一种用于场效应晶体管的新结构，其中源区和漏区中的至少一个 是多层结构，其中高杂质浓度部分和低杂质浓度部分彼此交替重叠。

公开(公告)号：US5153702A

公开(公告)日：1992-10-06

申请号：US203935

申请日：1988-06-08

申请人： Takashi Aoyama ,  Nobutake Konishi ,  Takaya Suzuki ,  Kenji Miyata ,  Saburo Oikawa ,  Yoshiaki Okajima ,  Genshiro Kawachi ,  Eimi Adachi

发明人： Takashi Aoyama ,  Nobutake Konishi ,  Takaya Suzuki ,  Kenji Miyata ,  Saburo Oikawa ,  Yoshiaki Okajima ,  Genshiro Kawachi ,  Eimi Adachi

IPC分类号： G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L29/04 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L21/2022 ,  H01L27/1229 ,  H01L29/045 ,  H01L29/78675 ,  G02F1/1368 ,  G02F2202/104

摘要： This invention relates to a thin film semiconductor device and a method for fabricating it, and more particularly a thin film semiconductor device suitably applicable to a display device in an active matrix system and a method for fabricating it. In this invention, the structure of a thin film semiconductor device for improving the characteristic thereof and particularly the structure relative to the dominant orientation of a poly-Si film as an active layer of a thin film transistor (TFT) is disclosed. A method for fabricating a thin film semiconductor device which is capable of forming a poly-Si film at a relatively low process temperature is disclosed. Further, a display device in an active matrix system which provided high performance and high image quality is disclosed. The poly-Si film having a dominant orientation of (111) is formed by forming a poly-Si film on the semiconductor substrate at a temperature up to 570.degree. C. and annealing the substrate at a temperature up to 640.degree. C.

摘要翻译： 本发明涉及一种薄膜半导体器件及其制造方法，更具体地说，涉及适用于有源矩阵系统中的显示装置的薄膜半导体器件及其制造方法。 在本发明中，公开了用于改善其特性的薄膜半导体器件的结构，特别是关于作为薄膜晶体管（TFT）的有源层的多晶硅膜的主导方向的结构。 公开了一种能够在较低处理温度下形成多晶硅薄膜的薄膜半导体器件的制造方法。 此外，公开了提供高性能和高图像质量的有源矩阵系统中的显示装置。 通过在半导体衬底上在高达570℃的温度下形成多晶硅膜，并在高达640℃的温度下对衬底进行退火，形成具有（111）主导取向性的多晶硅膜。

公开(公告)号：US4943837A

公开(公告)日：1990-07-24

申请号：US166518

申请日：1988-03-10

申请人： Nobutake Konishi ,  Kikuo Ono ,  Takaya Suzuki ,  Kenji Miyata

发明人： Nobutake Konishi ,  Kikuo Ono ,  Takaya Suzuki ,  Kenji Miyata

IPC分类号： H01L21/205 ,  H01L21/336 ,  H01L27/12 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/42384 ,  H01L29/78666 ,  Y10S438/958

摘要： A thin film transistor and a method of fabricating the transistor are disclosed. The gate electrode of this thin film transistor is made small in thickness so that active hydrogen for hydrogenating passivation can penetrate in a surface layer of channel region having substantially uniform thickness, through the gate electrode. Thus, hydrogenation can be effectively carried out for the thin film transistor, independently of the length of a channel formed in the transistor.

摘要翻译： 公开了一种薄膜晶体管及其制造方法。 该薄膜晶体管的栅电极的厚度较小，因此用于氢化钝化的活性氢可通过栅电极穿透具有基本均匀厚度的沟道区的表面层。 因此，可以独立于在晶体管中形成的沟道的长度，有效地对薄膜晶体管进行氢化。

公开(公告)号：US4942441A

公开(公告)日：1990-07-17

申请号：US30623

申请日：1987-03-27

申请人： Nobutake Konishi ,  Yoshikazu Hosokawa ,  Akio Mimura ,  Takaya Suzuki ,  Jun-ichi Ohwada ,  Hideaki Kawakami ,  Kenji Miyata

发明人： Nobutake Konishi ,  Yoshikazu Hosokawa ,  Akio Mimura ,  Takaya Suzuki ,  Jun-ichi Ohwada ,  Hideaki Kawakami ,  Kenji Miyata

IPC分类号： G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/092 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L27/1214 ,  G02F1/1368 ,  H01L21/84 ,  H01L29/7839 ,  G02F2202/103 ,  G02F2202/104

摘要： Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.

摘要翻译： 形成在绝缘衬底上的互补薄填充晶体管（C-TFT），包括一对高电阻性n型硅岛，在一个岛中形成的一对重掺杂n型区，以形成n和 沟道TFT，一对触点形成在另一个岛的表面上，并且当下面的区域为n型时建立高电势势垒，并且当下面的区域被反相为p型时形成低电势势垒。 制造互补TFT的工艺可以大大简化。

公开(公告)号：US4745088A

公开(公告)日：1988-05-17

申请号：US830713

申请日：1986-02-19

申请人： Yosuke Inoue ,  Takaya Suzuki ,  Masahiro Okamura ,  Noboru Akiyama ,  Masato Fujita ,  Hiroo Tochikubo ,  Shinya Iida

发明人： Yosuke Inoue ,  Takaya Suzuki ,  Masahiro Okamura ,  Noboru Akiyama ,  Masato Fujita ,  Hiroo Tochikubo ,  Shinya Iida

IPC分类号： H01L21/205 ,  C23C16/458 ,  C23C16/46 ,  H01L21/31 ,  C23C16/00

CPC分类号： C23C16/46 ,  C23C16/4584 ,  Y10S148/057 ,  Y10S148/169 ,  Y10S438/935

摘要： The vapor phase growth on semiconductor wafers is carried out by an apparatus in which a multiplicity of semiconductor wafers are held by a holder so that the semiconductor wafers lie one over another in a vertical direction, and are rotated together with the holder, the holder is placed in a heater disposed in a reaction vessel, a raw material gas supply nozzle and a raw material gas exhaust nozzle are provided within the heater so that the semiconductor wafers are interposed between the gas supply nozzle and the gas discharge nozzle, and the gas supply nozzle and the gas discharge nozzle have gas supply holes and gas discharge holes, respectively, so that a raw material gas can flow on each semiconductor wafer in horizontal directions. When the temperature of the heater is raised by a heating source to heat the semiconductor wafers, the raw material gas is supplied from the gas supply holes to each semiconductor wafer, and thus a uniform layer is grown on each semiconductor wafer from the raw material gas.

摘要翻译： 半导体晶片上的气相生长由多个半导体晶片被保持器保持的装置进行，使得半导体晶片在垂直方向上一个接一个地并且与保持器一起旋转，保持器是 放置在设置在反应容器中的加热器中，原料气体供给喷嘴和原料气体排出喷嘴设置在加热器内，使得半导体晶片插入在气体供给喷嘴和气体排出喷嘴之间，气体供给 喷嘴和气体排出喷嘴分别具有气体供给孔和气体排出孔，使得原料气体可以在水平方向上在每个半导体晶片上流动。 当加热器的温度由加热源升高以加热半导体晶片时，原料气体从气体供给孔供给到每个半导体晶片，因此从原料气体在每个半导体晶片上生长均匀的层 。

公开(公告)号：US4562637A

公开(公告)日：1986-01-07

申请号：US622584

申请日：1984-06-20

申请人： Tadao Kushima ,  Tasao Soga ,  Takaya Suzuki

发明人： Tadao Kushima ,  Tasao Soga ,  Takaya Suzuki

IPC分类号： H01L31/042 ,  H01L31/05 ,  H05K3/36 ,  H01L31/18

CPC分类号： H01L31/1876 ,  H01L31/0512 ,  H05K3/363 ,  Y02E10/50 ,  Y02P70/521 ,  Y10T29/49169 ,  Y10T29/49179 ,  Y10T29/49181

摘要： A method of manufacturing a solar battery by serially connecting a plurality of solar battery elements arranged spaced from each other. A pair of flexible films are used to sandwich the arrangement of the solar battery elements, and each of the flexible films has a plurality of conductive members formed thereon at positions respectively corresponding to the solar battery elements. However, each conductive member has one end portion extended beyond the surface of the corresponding solar battery element in the direction of the alignment of the solar battery elements. Thus, when the pair of flexible films are disposed to sandwich the solar battery elements, the extended end portion of the conductive member on the side of the light receiving surface of one solar battery element is positioned in the space between adjacent solar battery elements opposite the end portion of the conductive member on the side of the back surface of the next solar battery element. By welding both end portions of the conductive members by, for example, a laser beam, the adjacent solar battery elements are successively connected in series.

摘要翻译： 通过串联连接彼此间隔布置的多个太阳能电池元件来制造太阳能电池的方法。 使用一对柔性膜来夹持太阳能电池元件的布置，并且每个柔性膜在分别对应于太阳能电池元件的位置处形成有多个导电构件。 然而，每个导电构件具有在太阳能电池元件的对准方向上延伸超过相应的太阳能电池元件的表面的一个端部。 因此，当一对柔性膜被设置成夹持太阳能电池元件时，导电构件的一个太阳能电池元件的光接收表面侧的延伸端部位于相邻的太阳能电池元件之间的空间中 导电构件的下一个太阳能电池元件的背面侧的端部。 通过例如通过激光束焊接导电部件的两端部，相邻的太阳能电池元件依次连续地连接。