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253 条记录 (耗时 0.029 秒)

    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 失效
    半导体器件

    公开(公告)号：US20100072451A1

    公开(公告)日：2010-03-25

    申请号：US12373185

    申请日：2006-07-21

    申请人： Motoyasu Terao ,  Satoru Hanzawa ,  Takahiro Morikawa ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Nozomu Matsuzaki

    发明人： Motoyasu Terao ,  Satoru Hanzawa ,  Takahiro Morikawa ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Nozomu Matsuzaki

    IPC分类号： H01L45/00 ,  H01L27/04

    CPC分类号： G11C13/0004 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    摘要： A recording layer 52 made of a chalcogenide material which stores a high-resistance state of a high electrical resistance value and a low-resistance state of a low electrical resistance value is used as a memory element RM in a memory cell region, and it is formed so that a concentration of Ga or In of a first layer 52a positioned on a lower electrode TP side of the recording layer 52 is higher than the corresponding concentration of a second layer 52b positioned on an upper electrode 53 side. For example, the recording layer is formed so that a content of Ga or In of the second layer is 5 atomic % or more smaller than that of the first layer. Also, a circuit which can reverse the voltage polarity between the upper electrode and the lower electrode in a set operation and a reset operation is provided.

    摘要翻译： 作为存储单元区域中的存储元件RM，使用由存储高电阻值的高电阻状态和低电阻值的低电阻状态的硫族化物材料制成的记录层52， 使得位于记录层52的下电极TP侧的第一层52a中的Ga或In的浓度高于位于上电极53侧的第二层52b的相应浓度。 例如，记录层形成为使得第二层中的Ga或In的含量比第一层的含量低5原子％以上。 此外，提供了在设定操作和复位操作中可以反转上电极和下电极之间的电压极性的电路。

    Semiconductor device
    2.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US08319204B2

    公开(公告)日：2012-11-27

    申请号：US12373185

    申请日：2006-07-21

    申请人： Motoyasu Terao ,  Satoru Hanzawa ,  Takahiro Morikawa ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Nozomu Matsuzaki

    发明人： Motoyasu Terao ,  Satoru Hanzawa ,  Takahiro Morikawa ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Nozomu Matsuzaki

    IPC分类号： H01L45/00 ,  H01L27/04

    CPC分类号： G11C13/0004 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    摘要： A recording layer 52 made of a chalcogenide material which stores a high-resistance state of a high electrical resistance value and a low-resistance state of a low electrical resistance value is used as a memory element RM in a memory cell region, and it is formed so that a concentration of Ga or In of a first layer 52a positioned on a lower electrode TP side of the recording layer 52 is higher than the corresponding concentration of a second layer 52b positioned on an upper electrode 53 side. For example, the recording layer is formed so that a content of Ga or In of the second layer is 5 atomic % or more smaller than that of the first layer. Also, a circuit which can reverse the voltage polarity between the upper electrode and the lower electrode in a set operation and a reset operation is provided.

    摘要翻译： 作为存储单元区域中的存储元件RM，使用由存储高电阻值的高电阻状态和低电阻值的低电阻状态的硫族化物材料制成的记录层52， 使得位于记录层52的下电极TP侧的第一层52a中的Ga或In的浓度高于位于上电极53侧的第二层52b的相应浓度。 例如，记录层形成为使得第二层中的Ga或In的含量比第一层的含量低5原子％以上。 此外，提供了在设定操作和复位操作中可以反转上电极和下电极之间的电压极性的电路。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20090039335A1

    公开(公告)日：2009-02-12

    申请号：US12162769

    申请日：2006-02-09

    申请人： Motoyasu Terao ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Satoru Hanzawa

    发明人： Motoyasu Terao ,  Kenzo Kurotsuchi ,  Riichiro Takemura ,  Norikatsu Takaura ,  Satoru Hanzawa

    IPC分类号： H01L45/00

    CPC分类号： H01L27/101 ,  G11C13/0004 ,  G11C13/0011 ,  G11C2213/79 ,  H01L27/0688 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

    摘要： On an insulating film (31) in which a plug (35) is embedded, a second component releasing region (45) made of a first component and a second component, a solid electrolyte region (46) made of chalcogenide and an upper electrode region (47) are sequentially formed. The second component releasing region (45) made of a first component and a second component is composed of dome-shaped electrode portions (43) and an insulating film (44) burying the peripheries of the electrode portions (43), and at least one electrode portion (43) exists on the plug (34). The electrode portion (43) is composed of a first portion made of the first component such as tantalum oxide that is stable even when electric field is applied thereto and a second portion made of the second component such as copper or silver that is easily diffused in the solid electrolyte region (42) and moves therein by the application of an electric field. The second component supplied from the electrode portion (43) moves in the solid electrolyte region (46), thereby storing the information.

    摘要翻译： 在其中嵌入有插塞（35）的绝缘膜（31）上，由第一部件和第二部件制成的第二部件释放区域（45），由硫族化物制成的固体电解质区域（46）和上部电极区域 （47）。 由第一部件和第二部件制成的第二部件释放区域（45）由埋入电极部分（43）的周边的圆顶状电极部分（43）和绝缘膜（44）组成，并且至少一个 电极部分（43）存在于插头（34）上。 电极部（43）由第一部分（例如氧化钽）构成的第一部分，即使施加电场也是稳定的，而由诸如铜或银的第二部分制成的第二部分容易扩散 固体电解质区域（42）并通过施加电场而在其中移动。 从电极部（43）供给的第二部件在固体电解质区域（46）中移动，从而存储信息。

    Semiconductor integrated circuit device
    8.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US08129707B2

    公开(公告)日：2012-03-06

    申请号：US12487492

    申请日：2009-06-18

    申请人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    发明人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    IPC分类号： H01L47/00

    CPC分类号： H01L27/2436 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译： 通过高速非易失性相变存储器，提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中，形成了使用相变材料的包括电阻元件的存储单元的相变材料层，用于常用。 结果，减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化，从而提高了存储单元的刷新次数的可靠性。