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公开(公告)号：US20150053467A1
公开(公告)日：2015-02-26
申请号：US14526698
申请日：2014-10-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shigetoshi Hayashi , Tomoya Yokoyama , Takako Sato
CPC classification number: H05K1/112 , H01L23/13 , H01L23/15 , H01L23/49805 , H01L23/49822 , H01L23/49838 , H01L2224/16225 , H01L2924/15162 , H01L2924/1531 , H01L2924/19105 , H05K1/0271 , H05K1/0298 , H05K1/0306 , H05K1/092 , H05K1/113 , H05K1/116 , H05K1/165 , H05K3/403 , H05K3/4629 , H05K2201/083 , H05K2201/09145
Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.
Abstract translation: 提供一种多层基板，其可以防止由于电极焊盘的线膨胀系数与陶瓷材料的线性膨胀系数之间的差异而产生的应力产生的裂纹。 布置在最外面部件安装电极焊盘下方的层上的电极焊盘的面积大于部件安装电极焊盘的面积。 类似地，布置在部件安装电极焊盘下方的层上的电极焊盘具有比部件安装电极焊盘的面积更大的面积，布置在部件安装电极焊盘下方的电极焊盘的面积大于 部件安装电极焊盘和布置在部件安装电极焊盘下方的层上的电极焊盘的面积大于部件安装电极焊盘的面积。
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公开(公告)号：US08810352B2
公开(公告)日：2014-08-19
申请号：US13955505
申请日：2013-07-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Tomoya Yokoyama , Takako Sato , Akihiro Ieda , Shigetoshi Hayashi , Hirokazu Yazaki
CPC classification number: H01F27/29 , H01F3/14 , H01F17/0033 , H01F27/292 , H01F41/04 , H01F41/046 , Y10T29/4902
Abstract: In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.
Abstract translation: 在层叠电感器元件中，外部电极和端子电极通过通孔，内部布线和端面电极电连接。 上表面侧的通孔设置在外部电极的正下方和非磁性铁氧体层的下方。 下表面侧的通孔设置在端子电极的正上方和非磁性铁氧体层。 由于最外层由非磁性铁氧体层限定，即使最外层设置有通孔，寄生电感也不会增加。 在这种情况下，内部布线不会在元件的表面上布线。 因此，不存在布线图案的复杂化，可以防止元件的安装面积的增大。
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公开(公告)号：US09204545B2
公开(公告)日：2015-12-01
申请号：US14526698
申请日：2014-10-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shigetoshi Hayashi , Tomoya Yokoyama , Takako Sato
CPC classification number: H05K1/112 , H01L23/13 , H01L23/15 , H01L23/49805 , H01L23/49822 , H01L23/49838 , H01L2224/16225 , H01L2924/15162 , H01L2924/1531 , H01L2924/19105 , H05K1/0271 , H05K1/0298 , H05K1/0306 , H05K1/092 , H05K1/113 , H05K1/116 , H05K1/165 , H05K3/403 , H05K3/4629 , H05K2201/083 , H05K2201/09145
Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.
Abstract translation: 提供一种多层基板，其可以防止由于电极焊盘的线膨胀系数与陶瓷材料的线性膨胀系数之间的差异而产生的应力产生的裂纹。 布置在最外面部件安装电极焊盘下方的层上的电极焊盘的面积大于部件安装电极焊盘的面积。 类似地，布置在部件安装电极焊盘下方的层上的电极焊盘具有比部件安装电极焊盘的面积更大的面积，布置在部件安装电极焊盘下方的电极焊盘的面积大于 部件安装电极焊盘和布置在部件安装电极焊盘下方的层上的电极焊盘的面积大于部件安装电极焊盘的面积。
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公开(公告)号：US09129733B2
公开(公告)日：2015-09-08
申请号：US13955488
申请日：2013-07-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takako Sato
CPC classification number: H01F17/0013 , H01F41/046 , H01F2017/0066
Abstract: A laminated inductor element is configured to prevent warpage of the entire element with a structure in which a non-magnetic ferrite layer on an upper surface side is reduced in thickness to achieve a reduction in height of the entire element, a non-magnetic ferrite layer on a lower surface side is increased in thickness to be thicker than the non-magnetic ferrite layer so as to prevent a metal component diffused from a magnetic ferrite layer from coming into electrical contact with a land electrode of a mounting substrate, and an inductor is disposed toward the lower surface side across a non-magnetic ferrite layer.
Abstract translation: 层叠电感器元件被配置为防止整个元件的翘曲，其中上表面侧的非磁性铁氧体层的厚度减小，以实现整个元件的高度的降低，非磁性铁氧体层 在下表面侧的厚度增加到比非磁性铁氧体层更厚，以防止从磁性铁氧体层扩散的金属成分与安装基板的焊盘电极电接触，并且电感器 通过非磁性铁氧体层朝向下表面侧设置。
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Patent Agency Ranking
公开(公告)号：US20150022307A1
公开(公告)日：2015-01-22
申请号：US14505617
申请日：2014-10-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Tomoya Yokoyama , Takako Sato
IPC: H01F27/28
CPC classification number: H01F27/2804 , H01F5/003 , H01F17/0033 , H01F38/14 , H01F2027/2809 , H01Q7/06
Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.
Abstract translation: 多层体12包括具有设置有多个线状导体16的上表面的非磁性片SH1a，SH1b，具有多个直线导体18a的上表面的磁性片SH3和具有上表面的非磁性片SH4 设置有多个线性导体18b，它们一个堆叠在另一个之上。 通孔导体或侧面导体与多层体12一起设置，以将这些线状导体彼此连接并形成电感器。 多个线状导体具有在层叠方向上彼此相邻的至少两个片材中共有的图案。
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公开(公告)号：US11064606B2
公开(公告)日：2021-07-13
申请号：US16903499
申请日：2020-06-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takako Sato
Abstract: A multilayer substrate includes a stacked body including a plurality of insulating base material layers stacked on each other and a plurality of conductor patterns provided in contact with the plurality of insulating base material layers. The stacked body includes a first surface, and the plurality of conductor patterns include a plurality of mounting electrodes. The plurality of mounting electrodes include first openings. The first openings, in a plan view of a mounting surface, are provided over a mounting region and a non-mounting region of the mounting electrodes. The mounting region, when a mounted component is mounted, overlaps with the mounted component, and the non-mounting region does not overlap with the mounted component.
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公开(公告)号：US10980112B2
公开(公告)日：2021-04-13
申请号：US16708558
申请日：2019-12-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takako Sato , Takeshi Osuga , Masanori Okamoto
Abstract: A multilayer wiring board includes first and second insulating layers, a first conductive wiring layer on the first insulating layer, a second conductive wiring layer on a surface of the second insulating layer facing the first insulating layer, an interlayer connection conductor including an intermetallic compound and penetrating through the first insulating layer to interconnect the first and second conductive wiring layers, a first intermetallic compound layer between the first conductive wiring layer and the interlayer connection conductor, and a second intermetallic compound layer between the second conductive wiring layer and the interlayer connection conductor, wherein the intermetallic compounds in the first and second intermetallic compound layers have a composition different from that of the intermetallic compound in the interlayer connection conductor, and the first intermetallic compound layer is located at a level different from a level of an interface between the first conductive wiring layer and the first insulating layer.
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公开(公告)号：US12289826B2
公开(公告)日：2025-04-29
申请号：US17506923
申请日：2021-10-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takako Sato , Hiroki Maegawa
Abstract: A multilayer resin substrate includes insulating resin base material layers, and conductor patterns on at least one of the insulating resin base material layers. The conductor patterns include a ground conductor on a main surface of the insulating resin base material layers and extend into a frame shape or a planar shape, and the ground conductor includes openings. An aperture ratio of the openings in an outer peripheral portion of the ground conductor is less than an aperture ratio of the openings in an inner peripheral portion of the ground conductor.
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公开(公告)号：US09424981B2
公开(公告)日：2016-08-23
申请号：US14505617
申请日：2014-10-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Tomoya Yokoyama , Takako Sato
CPC classification number: H01F27/2804 , H01F5/003 , H01F17/0033 , H01F38/14 , H01F2027/2809 , H01Q7/06
Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.
Abstract translation: 多层体12包括具有设置有多个线状导体16的上表面的非磁性片SH1a，SH1b，具有多个直线导体18a的上表面的磁性片SH3和具有上表面的非磁性片SH4 设置有多个线性导体18b，它们一个堆叠在另一个之上。 通孔导体或侧面导体与多层体12一起设置，以将这些线状导体彼此连接并形成电感器。 多个线状导体具有在层叠方向上彼此相邻的至少两个片材中共有的图案。
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