公开(公告)号：US5670811A

公开(公告)日：1997-09-23

申请号：US430289

申请日：1995-04-28

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

IPC分类号： H01L21/225 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L29/66333 ,  H01L21/2257 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802

摘要： The present invention is directed to a semiconductor device which can achieve high current density and which has a high reliability. In the insulated gate semiconductor device according to the present invention, a plurality of insulating gates are provided, with each two adjacent insulating gates being spaced from each other, the insulating gates being provided on a second semiconductor region of a first conductivity type. A first semiconductor region, of the same or different conductivity type from that of the second semiconductor region, extends from a surface of the second semiconductor region opposed to the surface thereof having the insulating gates thereon. A plurality of third semiconductor regions are provided in the second semiconductor region, between the insulating gates and aligned therewith, and two fourth semiconductor regions are provided extending into each of the third semiconductor regions, aligned with the sides of adjacent insulating gates. Electrodes are respectively provided in contact with the first semiconductor region and in contact with the third and fourth semiconductor regions, the electrode in contact with the third and fourth semiconductor regions contacting such regions in the space between adjacent insulating gates. By utilizing such aligned third and fourth semiconductor regions, an insulated gate semiconductor device which operates at high current densities can be fabricated at high accuracy, and such device will be less influenced by parasitic bipolar transistor effects.

摘要翻译： 本发明涉及能够实现高电流密度并且具有高可靠性的半导体器件。 在根据本发明的绝缘栅半导体器件中，设置有多个绝缘栅极，每个两个相邻的绝缘栅极彼此间隔开，绝缘栅极设置在第一导电类型的第二半导体区域上。 与第二半导体区域相同或不同的导电类型的第一半导体区域从与其上具有绝缘栅极的表面相对的第二半导体区域的表面延伸。 多个第三半导体区域设置在第二半导体区域中，在绝缘栅极之间并与其对准，并且提供两个第四半导体区域，其延伸到每个第三半导体区域中，与相邻绝缘栅极的侧面对准。 电极分别设置成与第一半导体区域接触并且与第三和第四半导体区域接触，与第三和第四半导体区域接触的电极与相邻绝缘栅极之间的空间中的这些区域接触。 通过利用这种对准的第三和第四半导体区域，可以以高精度制造以高电流密度工作的绝缘栅极半导体器件，并且这种器件将受寄生双极晶体管效应的影响较小。

公开(公告)号：US5179034A

公开(公告)日：1993-01-12

申请号：US683695

申请日：1991-04-11

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

IPC分类号： H01L21/225 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/2257 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  Y10S148/126

摘要： A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.30 -source layer.

摘要翻译： 一种用于制造绝缘栅半导体器件的方法包括以下步骤：在n层表面上形成绝缘栅极，使用绝缘浇口作为掩模在n层中形成p阱层，在侧壁上形成磷硅玻璃层 的绝缘栅极，并将杂质从磷硅玻璃层扩散到p阱层中以形成n30源层。

公开(公告)号：US5032532A

公开(公告)日：1991-07-16

申请号：US233007

申请日：1988-08-17

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

IPC分类号： H01L29/68 ,  H01L21/225 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/2257 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  Y10S148/126

摘要： A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.+ -source layer.

公开(公告)号：US5285094A

公开(公告)日：1994-02-08

申请号：US921226

申请日：1992-07-29

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda ,  Yasunori Nakano

IPC分类号： H01L21/225 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L29/66333 ,  H01L21/2257 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802

摘要： The present invention relates to a semiconductor device having an n-type semiconductor region forming one of the main surfaces of a semiconductor substrate, with a plurality of p-type semiconductor regions formed in the n-type semiconductor region. Two exposed n-type semiconductor regions are formed on each of the p-type semiconductor regions, with a main electrode formed on the n-type semiconductor regions and the exposed p-type semiconductor region therebetween. An insulated gate extends from one of the n-type semiconductor regions in one of the p-type semiconductor regions to a closer one of the n-type semiconductor regions in an adjacent p-type semiconductor region. The length of the insulated gate is longer than a distance between adjacent insulated gates.

摘要翻译： 本发明涉及一种半导体器件，其具有形成半导体衬底的主表面之一的n型半导体区域，其中形成在n型半导体区域中的多个p型半导体区域。 在p型半导体区域的每一个上形成有两个暴露的n型半导体区域，其中主电极形成在n型半导体区域上，并且其间暴露的p型半导体区域。 绝缘栅极从p型半导体区域中的一个中的n型半导体区域中的一个延伸到相邻p型半导体区域中的更靠近的n型半导体区域中的一个。 绝缘栅极的长度大于相邻绝缘栅之间的距离。

公开(公告)号：US5274541A

公开(公告)日：1993-12-28

申请号：US631289

申请日：1990-12-20

申请人： Shin Kimura ,  Yasuo Matsuda ,  Norikazu Tokunaga ,  Mutsuhiro Mori ,  Toshiki Kurosu ,  Yutaka Suzuki ,  Naoki Sakurai ,  Yasumichi Yasuda ,  Tomoyuki Tanaka ,  Kenichi Onda

发明人： Shin Kimura ,  Yasuo Matsuda ,  Norikazu Tokunaga ,  Mutsuhiro Mori ,  Toshiki Kurosu ,  Yutaka Suzuki ,  Naoki Sakurai ,  Yasumichi Yasuda ,  Tomoyuki Tanaka ,  Kenichi Onda

IPC分类号： H01L25/07 ,  H01L25/18 ,  H02M7/00 ,  H02M7/48 ,  H02M7/5387 ,  H02P25/04 ,  H02P27/06 ,  H03K17/0814 ,  H03K17/567 ,  H02H7/122 ,  H03K17/687

CPC分类号： H02M7/487 ,  H01L25/072 ,  H02M7/003 ,  H03K17/08148 ,  H03K17/567 ,  H01L2224/48091 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107

摘要： In a module using a high-speed switching element such as an IGBT for a high-speed inverter, a matching condition is established between the switching characteristic of the IGBT and the recovery characteristic of the diode to be connected thereto in an anti-parallel fashion. As a result, the oscillating voltage appearing in the inverter circuit is suppressed to prevent erroneous operation of the inverter system.

摘要翻译： 在使用诸如用于高速逆变器的IGBT的高速开关元件的模块中，以反并联方式在IGBT的开关特性和与其连接的二极管的恢复特性之间建立匹配条件 。 结果，抑制逆变器电路中出现的振荡电压，以防止逆变器系统的错误操作。

公开(公告)号：US4935799A

公开(公告)日：1990-06-19

申请号：US285328

申请日：1988-12-13

申请人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda

发明人： Mutsuhiro Mori ,  Tomoyuki Tanaka ,  Yasumichi Yasuda

IPC分类号： H01L27/06 ,  H01L21/8249 ,  H01L27/07 ,  H01L29/73

CPC分类号： H01L27/0716 ,  H01L29/7302

摘要： Disclosed is a composite semiconductor device which comprises: a second and a third semiconductor regions of a second conductivity type formed in a first semiconductor region of a first conductivity type independently of each other and so as to be exposed on one main surface of a semiconductor substrate; a fourth and a fifth semiconductor regions of the first conductivity type formed in the second semiconductor region independently of each other and so as to be exposed on the one main surface of the semiconductor substrate; a first insulated gate electrode formed on the second semiconductor region located between the fifth and first semiconductor regions and exposed on the one main surface; a second insulated gate electrode formed on the first semiconductor region located between the second and third semiconductor regions and exposed on the one main surface; an electrode which shorts the fourth and third semiconductor regions; another electrode which shorts the second and fifth semiconductor regions; and a further electrode provided in the first semiconductor region.

摘要翻译： 公开了一种复合半导体器件，其包括：第二导电类型的第二和第三半导体区域形成在第一导电类型的第一半导体区域中，并且彼此独立地暴露在半导体衬底的一个主表面上 ; 第一导电类型的第四和第五半导体区域彼此独立地形成在第二半导体区域中，并暴露在半导体衬底的一个主表面上; 第一绝缘栅电极，形成在位于第五半导体区域和第一半导体区域之间并暴露在一个主表面上的第二半导体区域上; 第二绝缘栅电极，形成在位于第二和第三半导体区之间的第一半导体区上并暴露在一个主表面上; 短路第四和第三半导体区域的电极; 另一个使第二和第五半导体区域短路的电极; 以及设置在所述第一半导体区域中的另一电极。

公开(公告)号：US4466009A

公开(公告)日：1984-08-14

申请号：US322698

申请日：1981-11-18

申请人： Nobutake Konishi ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

发明人： Nobutake Konishi ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

IPC分类号： G02B6/36 ,  G02B6/38 ,  G02B6/42 ,  H01L29/74 ,  H01L31/111 ,  H01L31/12 ,  H01L27/14

CPC分类号： G02B6/3858 ,  G02B6/3604 ,  G02B6/382 ,  G02B6/3825 ,  G02B6/3855 ,  G02B6/3897 ,  G02B6/421 ,  G02B6/4248 ,  G02B6/4292 ,  G02B6/4295 ,  H01L29/74 ,  H01L31/1113 ,  G02B6/4207

摘要： In a light-activated semiconductor device wherein a light-activated semiconductor element accommodated in a package is driven by a light signal fed from an external light source into the package through an optical guide, the optical guide comprises a first portion passing through the package and a second portion for optically coupling the first portion and the light-activated element.

摘要翻译： 在光激活半导体器件中，其中容纳在封装中的光激活半导体元件通过光引导器从外部光源馈送到封装体中的光信号被驱动，光引导件包括穿过封装的第一部分和 用于光学耦合第一部分和光激活元件的第二部分。

公开(公告)号：US5126806A

公开(公告)日：1992-06-30

申请号：US442608

申请日：1989-11-29

申请人： Naoki Sakurai ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

发明人： Naoki Sakurai ,  Mutsuhiro Mori ,  Tomoyuki Tanaka

IPC分类号： H01L29/68 ,  H01L29/739 ,  H01L29/74 ,  H01L29/749 ,  H01L29/78

CPC分类号： H01L29/7398 ,  H01L29/7393 ,  H01L29/7394

摘要： A lateral insulated gate bipolar transistor comprises a p layer and a p.sup.+ layer provided apart from each other and extending from a surface of an n.sup.- layer into the n.sup.- layer, an n.sup.+ layer provided extending from a surface of the p layer into the p layer, a first main electrode provided in ohmic contact with the n.sup.+ layer and the p layer, a second main electrode provided in ohmic contact with the p.sup.+ layer, and a control electrode provided through an insulating film on the n.sup.+ layer, the p layer and the n.sup.- layer on the side of the first main electrode away from the second main electrode.

公开(公告)号：US20130280980A1

公开(公告)日：2013-10-24

申请号：US13977931

申请日：2012-01-20

申请人： Tomoyuki Tanaka ,  Kouji Okazaki

发明人： Tomoyuki Tanaka ,  Kouji Okazaki

IPC分类号： H01T21/02

CPC分类号： H01T21/02

摘要： A method of manufacturing a spark plug includes a joining step of joining a first member and a second member which constitute the spark plug. In the joining step, a first welding electrode in contact with the first member and a second welding electrode which has an elastically deformable intermediate portion and which is in contact with the second member are electrically connected through the first member and the second member, whereby the first member and the second member are joined together by resistance welding.

摘要翻译： 一种火花塞的制造方法包括：接合步骤，其接合构成火花塞的第一部件和第二部件。 在接合步骤中，与第一构件接触的第一焊接电极和具有可弹性变形的中间部分并与第二构件接触的第二焊接电极通过第一构件和第二构件电连接，由此， 第一构件和第二构件通过电阻焊接连接在一起。

公开(公告)号：US08419491B2

公开(公告)日：2013-04-16

申请号：US13360086

申请日：2012-01-27

申请人： Tomoyuki Tanaka ,  Takashi Tamada

发明人： Tomoyuki Tanaka ,  Takashi Tamada

IPC分类号： H01T21/02

CPC分类号： H01T21/02 ,  H01T13/32 ,  Y10T83/04

摘要： When a movable blade cuts a distal end portion of a ground electrode member and is pulled back along a cut surface formed at a distal end of the ground electrode member, the distal end portion may move in the pull-back direction of the movable blade due to friction generated between the movable blade and the cut surface. This movement could cause deflective deformation of the ground electrode member. In order to restrain such movement, a support part is provided on the movable blade via a spring located near the cut surface. During the pull back step, the support part presses and supports the portion of the cut ground electrode member near the distal end thereof. Therefore, even when friction is generated when the movable blade is pulled back, the ground electrode member does not undergo deflective deformation.

摘要翻译： 当可动刀片切割接地电极构件的远端部分并且沿着形成在接地电极构件的远端处的切割表面被拉回时，远端部分可以在可移动刀片的拉回方向上移动， 在可动刀片和切割表面之间产生摩擦。 该运动可能导致接地电极部件的偏转变形。 为了抑制这种移动，通过位于切割面附近的弹簧，在可动刀片上设置有支撑部。 在拉回步骤期间，支撑部件在其远端附近按压和支撑切割的接地电极部件的部分。 因此，即使当可动刀片被拉回时产生摩擦时，接地电极部件也不会发生偏转变形。