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公开(公告)号:US20160005710A1
公开(公告)日:2016-01-07
申请号:US14728891
申请日:2015-06-02
Applicant: NXP B.V.
Inventor: Sven Walczyk , Johan de Beer , Erik Eltink , Amar Mavinkurve
IPC: H01L23/00 , B23K1/20 , B23K1/00 , H01L23/495 , H01L21/48
CPC classification number: H01L24/81 , B23K1/0016 , B23K1/20 , H01L23/49572 , H01L23/49586 , H01L24/13 , H01L24/16 , H01L2224/10175 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2224/16227 , H01L2224/16245 , H01L2224/81011 , H01L2224/81022 , H01L2224/81097 , H01L2224/81121 , H01L2224/81191 , H01L2224/8136 , H01L2224/81395 , H01L2224/81447 , H01L2224/81455 , H01L2224/8146 , H01L2224/81815 , H01L2225/06513 , H01L2924/014 , H01L2924/00014
Abstract: A method of attaching an electronic component to a metal substrate, wherein the electronic component comprises solder provided on an exposed solder region. The method comprising: forming a metal-based compound layer on the substrate; placing the electronic component on the metal substrate such that the solder region is in contact with a contact region of the metal-based compound layer; and heating the solder region such that the contact region of the metal-based compound layer dissolves and the solder region forms an electrical connection between the electronic component and the metal substrate. The metal-based compound layer can have a minimum thickness of 10 nm.
Abstract translation: 一种将电子部件附接到金属基板的方法,其中所述电子部件包括设置在暴露的焊料区域上的焊料。 该方法包括:在基底上形成金属基化合物层; 将电子部件放置在金属基板上,使得焊料区域与金属基化合物层的接触区域接触; 并且加热焊料区域使得金属基化合物层的接触区域溶解,并且焊料区域形成电子部件和金属基板之间的电连接。 金属基化合物层可以具有10nm的最小厚度。
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2.
公开(公告)号:US08981566B2
公开(公告)日:2015-03-17
申请号:US13890055
申请日:2013-05-08
Applicant: NXP B.V.
Inventor: Tim Boettcher , Sven Walczyk , Roelf Anco Jacob Groenhuis , Rolf Brenner , Emiel De Bruin
IPC: H01L23/48 , H01L23/00 , H01L25/065 , H01L25/00
CPC classification number: H01L21/78 , H01L21/56 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0346 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/05016 , H01L2224/05088 , H01L2224/051 , H01L2224/05111 , H01L2224/05147 , H01L2224/05568 , H01L2224/05573 , H01L2224/05582 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/06181 , H01L2224/13147 , H01L2224/16145 , H01L2224/20 , H01L2224/291 , H01L2224/32105 , H01L2224/32113 , H01L2224/32237 , H01L2224/33181 , H01L2224/9202 , H01L2224/94 , H01L2224/96 , H01L2225/06513 , H01L2225/06565 , H01L2924/00014 , H01L2924/10253 , H01L2924/12036 , H01L2924/014 , H01L2924/00 , H01L2224/03 , H01L2224/81 , H01L2224/05552
Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.
Abstract translation: 公开了一种分立半导体器件封装(100),包括半导体管芯(110),其具有第一表面和与所述第一表面相对的第二表面,所述第二表面承载触点(112); 所述接触件上的导电体(120); 横向封装所述导电体的封装材料(130) 以及与焊料帽导电接触的诸如焊料帽,另外的半导体管芯或其组合的封盖构件(140,610),所述焊帽覆盖在封装材料上。 可以在第一表面上设置另外的焊锡帽(150)。 还公开了制造这种分立半导体器件封装的方法。
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公开(公告)号:US09263335B2
公开(公告)日:2016-02-16
申请号:US14607587
申请日:2015-01-28
Applicant: NXP B.V.
Inventor: Tim Boettcher , Sven Walczyk , Roelf Anco Jacob Groenhuis , Rolf Brenner , Emiel De Bruin
CPC classification number: H01L21/78 , H01L21/56 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0346 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/05016 , H01L2224/05088 , H01L2224/051 , H01L2224/05111 , H01L2224/05147 , H01L2224/05568 , H01L2224/05573 , H01L2224/05582 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/06181 , H01L2224/13147 , H01L2224/16145 , H01L2224/20 , H01L2224/291 , H01L2224/32105 , H01L2224/32113 , H01L2224/32237 , H01L2224/33181 , H01L2224/9202 , H01L2224/94 , H01L2224/96 , H01L2225/06513 , H01L2225/06565 , H01L2924/00014 , H01L2924/10253 , H01L2924/12036 , H01L2924/014 , H01L2924/00 , H01L2224/03 , H01L2224/81 , H01L2224/05552
Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.
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