公开(公告)号：US06747299B2

公开(公告)日：2004-06-08

申请号：US10090633

申请日：2002-03-06

申请人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

发明人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

IPC分类号： H01L21338

CPC分类号： H01L23/5222 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

摘要： A high frequency semiconductor device includes a ground plate, an insulating layer, a power-supply conductor, an insulating interlayer, and a strip line as a line conductor. The power-supply conductor is disposed above the ground plate, with the insulating layer provided therebetween. The ground plate and the power-supply conductor have a capacitance formed therebetween. Thus, the line conductor regards the power-supply conductor as having a potential identical to that of the ground plate. This makes it possible to lay out the line conductor without considering the arrangement of the power-supply conductor. In other words, by two-dimensionally overlapping a microstrip line and a power-supply conductor in an MMIC, the degree of freedom in the device layout can be increased.

摘要翻译： 高频半导体器件包括接地板，绝缘层，电源导体，绝缘中间层和作为线导体的带状线。 电源导体设置在接地板的上方，绝缘层设置在它们之间。 接地板和电源导体之间形成有电容。 因此，线路导体将电源导体视为具有与接地板相同的电位。 这使得可以在不考虑电源导体的布置的情况下布线。 换句话说，通过在MMIC中二维地重叠微带线和电源导体，可以提高器件布局的自由度。

公开(公告)号：US06580166B2

公开(公告)日：2003-06-17

申请号：US10078450

申请日：2002-02-21

申请人： Osamu Baba ,  Yutaka Mimino ,  Yoshio Aoki ,  Muneharu Gotoh

发明人： Osamu Baba ,  Yutaka Mimino ,  Yoshio Aoki ,  Muneharu Gotoh

IPC分类号： H01L2310

CPC分类号： H01L23/66 ,  H01L23/3677 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A high frequency semiconductor device includes semiconductor elements provided on a semiconductor substrate, a surface insulating layer for covering the semiconductor elements, at least one wiring layer which is provided above the surface insulating layer, with at least one insulating interlayer provided therebetween, and which combines with the ground potential to form transmission line, and at least one heat-radiating stud which is provided in at least one throughhole so as to penetrate said insulating interlayers and so as not to penetrate said surface insulating layer.

公开(公告)号：US06787909B2

公开(公告)日：2004-09-07

申请号：US10084919

申请日：2002-03-01

申请人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

发明人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

IPC分类号： H01L2348

CPC分类号： H01L24/05 ,  H01L23/66 ,  H01L24/06 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2924/01004 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/00014 ,  H01L2924/00

摘要： A structure for preventing MMICs (Monolithic Microwave Integrated Circuits) from deterioration in the high-frequency transmission characteristics thereof, which results from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.

摘要翻译： 用于防止MMIC（单片微波集成电路）的高频传输特性的劣化的结构，这是由于在用于外部连接的引线接合期间施加到焊盘的机械压力引起的。 该结构包括设置在每个焊盘周围的层间绝缘膜的表面中的槽。 用于传输高频信号的线路导体没有剥离或弯曲，这是由于当施加到焊盘的机械压力时层间绝缘膜中的变形引起的，因此，传输特性的变化 可以使线路导体最小化，可以提高MMIC的可靠性。

公开(公告)号：US06712284B2

公开(公告)日：2004-03-30

申请号：US10090614

申请日：2002-03-06

申请人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

发明人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

IPC分类号： H01L31072

CPC分类号： H01Q1/526 ,  H01L23/552 ,  H01L2924/0002 ,  H01Q1/48 ,  H01Q9/0407 ,  H01L2924/00

摘要： In a high frequency semiconductor device, a shield plate which is connected to the ground potential is provided above an MMIC structure including line conductors, with an insulating interlayer provided therebetween. By using the shield plate to shield the MMIC, interference caused by external electromagnetic waves or leakage of electromagnetic waves to the exterior can be reduced in a chip alone.

摘要翻译： 在高频半导体器件中，连接到地电势的屏蔽板设置在包括线导体的MMIC结构之上，其间设置有绝缘夹层。 通过使用屏蔽板来屏蔽MMIC，可以仅在芯片中减少由外部电磁波引起的干扰或电磁波泄漏到外部的干扰。

公开(公告)号：US06489671B2

公开(公告)日：2002-12-03

申请号：US10084921

申请日：2002-03-01

申请人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

发明人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

IPC分类号： H01L2352

CPC分类号： H01L23/522 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.

摘要翻译： 半导体集成电路具有用于高速操作的3维互连线结构。 本发明的一个方面提供了一种具有三维比赛树形多层互连线的单片微波集成电路（MMIC），其中，MMIC的顶表面上的单个馈电点逐层分割， 通过多个层压互连层和其间形成像锦标赛树的垂直互连层，在MMIC的半导体衬底上形成多个电极。

公开(公告)号：US06900482B2

公开(公告)日：2005-05-31

申请号：US10096856

申请日：2002-03-14

申请人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

发明人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

IPC分类号： H01L21/338 ,  H01L29/06 ,  H01L29/423 ,  H01L29/80 ,  H01L29/812 ,  H01L29/76 ,  H01L31/112

CPC分类号： H01L29/42316 ,  H01L29/0692 ,  H01L29/802

摘要： A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.

摘要翻译： 用于功率放大的高频半导体器件在形成在半导体衬底的前表面上的每个有源区上具有梳齿电极。 本发明的一个方面提供了一种单片式微波集成电路（MMIC），其具有在半导体衬底的前表面上并排布置的多个矩形有源区，每个有源区具有交叉的栅极，漏极 和其上的源电极，其通过多层互连技术连接到相应的焊盘。 此外，源电位通过金属堵塞的通孔从衬底的背面进给。

公开(公告)号：US06853054B2

公开(公告)日：2005-02-08

申请号：US10078346

申请日：2002-02-21

申请人： Osamu Baba ,  Yutaka Mimino

发明人： Osamu Baba ,  Yutaka Mimino

IPC分类号： H01L21/768 ,  H01L21/82 ,  H01L21/822 ,  H01L23/522 ,  H01L23/552 ,  H01L23/66 ,  H01L27/04 ,  H01P3/08 ,  H01L23/58

CPC分类号： H01L23/5222 ,  H01L23/5225 ,  H01L23/552 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A high frequency semiconductor device including wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, electrical interference between two crossing wiring layer is prevented and transmission loss is suppressed.

摘要翻译： 一种高频半导体器件，包括形成在半导体衬底上的布线层，其中传输线通过与固定在接地电位的电位的接地板组合而形成，所述布线层相互交叉的至少一个交叉部分， 其中设置有绝缘夹层，并且至少一个分离电极选择性地设置在绝缘夹层之一上，所述至少一个分离电极具有固定在地电位的电位。 因此，在高频半导体装置中，防止了两个交叉布线层之间的电干扰，并抑制了传输损耗。

公开(公告)号：US06825809B2

公开(公告)日：2004-11-30

申请号：US10090612

申请日：2002-03-06

申请人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

发明人： Yoshio Aoki ,  Yutaka Mimino ,  Osamu Baba ,  Muneharu Gotoh

IPC分类号： H01Q136

CPC分类号： H01Q23/00 ,  H01Q1/38 ,  H01Q9/045

摘要： A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.

摘要翻译： 公开了一种用于消除连接到贴片电极的天线线的影响的结构，其内置于MMIC中的贴片天线的天线特性。 在贴片电极之下设置有在其间具有层间绝缘膜的天线接地面内形成有通孔，在与电极接地面相对的贴片电极的一侧设置电镀线，贴片电极 并且天线线通过穿过槽孔的导体彼此连接。

公开(公告)号：US06774484B2

公开(公告)日：2004-08-10

申请号：US10090610

申请日：2002-03-06

申请人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

发明人： Yutaka Mimino ,  Osamu Baba ,  Yoshio Aoki ,  Muneharu Gotoh

IPC分类号： H01L2334

CPC分类号： H01L23/5286 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.

摘要翻译： 用于MMIC的多层布线结构包括由多层布线（多条电源线）形成的电源布线。 电线通过通孔相互连接。 电源电流被分配并提供给线路。 即使当每个线的宽度减小时，也可以向整个多层布线提供大电流。 多层布线结构具有提高布线布局的自由度。

公开(公告)号：US20080048764A1

公开(公告)日：2008-02-28

申请号：US11878707

申请日：2007-07-26

申请人： Tsuneo Tokumitsu ,  Osamu Baba

发明人： Tsuneo Tokumitsu ,  Osamu Baba

IPC分类号： G05F1/10

CPC分类号： H03B19/14 ,  H03B7/00 ,  H03B7/06 ,  H03B7/14 ,  H03B2200/0062

摘要： An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.

摘要翻译： 电子电路装置包括负电阻发生电路，第二晶体管和路径。 负电阻产生电路具有第一晶体管，其具有耦合到谐振器的控制端。 第二晶体管具有耦合到第一晶体管的输出端子的控制端子，并且具有耦合到DC偏置端子的输出端子。 该路径通过第二晶体管耦合到DC偏置端子与第一晶体管的输出端子之间，并向第一晶体管提供偏置。