利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

11 条记录 (耗时 0.02 秒)

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号：US20110215417A1

    公开(公告)日：2011-09-08

    申请号：US12918542

    申请日：2009-02-26

    申请人： Philippe Meunier-Beillard ,  Mark C.J.C.M. Kramer ,  Johannes J.T.M. Donkers ,  Guillaume Boccardi

    发明人： Philippe Meunier-Beillard ,  Mark C.J.C.M. Kramer ,  Johannes J.T.M. Donkers ,  Guillaume Boccardi

    IPC分类号： H01L27/06 ,  H01L21/8249

    CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/42304 ,  H01L29/456 ,  H01L29/66242 ,  H01L29/7378

    摘要： A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22d and 22e) and a base region (33d) of the bipolar transistor. The bipolar transistor is provided with a first insulating cavity (92) provided in the collector region (22d and 22e). The base region (33d) is narrower in the plane of the substrate than the collector region (22d and 22e) due to a second insulating cavity (94) provided around the base region (33d) and between the collector region (22d and 22e) and the emitter region (4). By blocking diffusion from the base region the first insulating cavity (92) provides a reduction in the base collector capacitance and can be described as defining the base contact.

    摘要翻译： 一种半导体器件（10），包括半导体本体（1）内的双极晶体管和场效应晶体管，所述半导体本体（1）包括突出台面（5），所述突出台面（5）中至少一部分为集电极区域（22d和22e）和基极区域 33d）。 双极晶体管设置有设置在集电区域（22d和22e）中的第一绝缘腔（92）。 基极区域（33d）由于设置在基极区域（33d）周围的第二绝缘腔（94d）和集电极区域（22d〜22e）之间，在基板的平面内比集电体区域（22d，22e）窄， 和发射极区域（4）。 通过阻挡来自基极区域的扩散，第一绝缘腔（92）提供基极集电极电容的减小并且可以被描述为限定基极触点。

    Semiconductor device and method of manufacture thereof
    2.
    发明授权
    Semiconductor device and method of manufacture thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08541812B2

    公开(公告)日：2013-09-24

    申请号：US12918542

    申请日：2009-02-26

    申请人： Philippe Meunier-Beillard ,  Mark C. J. C. M. Kramer ,  Johannes J. T. M. Donkers ,  Guillaume Boccardi

    发明人： Philippe Meunier-Beillard ,  Mark C. J. C. M. Kramer ,  Johannes J. T. M. Donkers ,  Guillaume Boccardi

    IPC分类号： H01L29/66

    CPC分类号： H01L21/8249 ,  H01L27/0623 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/42304 ,  H01L29/456 ,  H01L29/66242 ,  H01L29/7378

    摘要： A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22d and 22e) and a base region (33d) of the bipolar transistor. The bipolar transistor is provided with a first insulating cavity (92) provided in the collector region (22d and 22e). The base region (33d) is narrower in the plane of the substrate than the collector region (22d and 22e) due to a second insulating cavity (94) provided around the base region (33d) and between the collector region (22d and 22e) and the emitter region (4). By blocking diffusion from the base region the first insulating cavity (92) provides a reduction in the base collector capacitance and can be described as defining the base contact.

    摘要翻译： 一种半导体器件（10），包括半导体本体（1）内的双极晶体管和场效应晶体管，所述半导体本体（1）包括突出台面（5），所述突出台面（5）中至少一部分为集电极区域（22d和22e）和基极区域 33d）。 双极晶体管设置有设置在集电区域（22d和22e）中的第一绝缘腔（92）。 基极区域（33d）由于设置在基极区域（33d）周围的第二绝缘腔（94d）和集电极区域（22d〜22e）之间，在基板的平面内比集电体区域（22d，22e）窄， 和发射极区域（4）。 通过阻挡来自基极区域的扩散，第一绝缘腔（92）提供基极集电极电容的减小并且可以被描述为限定基极触点。

    Interfacial layer regrowth control in high-K gate structure for field effect transistor
    3.
    发明授权
    Interfacial layer regrowth control in high-K gate structure for field effect transistor 有权
    用于场效应晶体管的高K栅极结构中的界面层再生长控制

    公开(公告)号：US08716812B2

    公开(公告)日：2014-05-06

    申请号：US13001383

    申请日：2009-06-24

    申请人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    发明人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    IPC分类号： H01L21/02

    CPC分类号： H01L29/51 ,  H01L21/265 ,  H01L21/28176 ,  H01L21/3115 ,  H01L21/31155 ,  H01L29/4236 ,  H01L29/49 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78 ,  H01L29/78696

    摘要： A field effect transistor having a gate structure comprising a high-K dielectric layer, a gate electrode located on the high-K dielectric layer, and an interfacial layer located in between the high-K dielectric layer and a channel region of the field effect transistor. The interfacial layer comprises a layer of SiO2 containing a regrowth inhibiting agent. A method of forming the gate structure includes forming a gate stack comprising, in order: a SiO2 layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2 layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing a regrowth inhibiting agent into the SiO2 layer and then annealing the gate structure. The presence of the regrowth inhibiting agent in the SiO2 interfacial layer inhibits regrowth of the SiO2 layer into the channel region during the annealing step.

    摘要翻译： 具有栅极结构的场效应晶体管包括高K电介质层，位于高K电介质层上的栅电极以及位于高K电介质层与场效应晶体管的沟道区之间的界面层 。 界面层包含含有再生长抑制剂的SiO 2层。 形成栅极结构的方法包括：形成栅叠层，其顺序包括：与场效应晶体管的沟道区相邻的SiO 2层; SiO2层上的高K电介质层; 以及在高K电介质层上的栅电极。 该方法还包括将再生长抑制剂引入SiO 2层中，然后对栅极结构进行退火。 在SiO 2界面层中再生抑制剂的存在在退火步骤期间抑制SiO 2层进入沟道区的再生长。

    INTERFACIAL LAYER REGROWTH CONTROL IN HIGH-K GATE STRUCTURE FOR FIELD EFFECT TRANSISTOR
    7.
    发明申请
    INTERFACIAL LAYER REGROWTH CONTROL IN HIGH-K GATE STRUCTURE FOR FIELD EFFECT TRANSISTOR 有权
    场效应晶体管的高K栅结构的界面层响应控制

    公开(公告)号：US20130187241A1

    公开(公告)日：2013-07-25

    申请号：US13001383

    申请日：2009-06-24

    申请人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    发明人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    IPC分类号： H01L29/51 ,  H01L21/265

    CPC分类号： H01L29/51 ,  H01L21/265 ,  H01L21/28176 ,  H01L21/3115 ,  H01L21/31155 ,  H01L29/4236 ,  H01L29/49 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78 ,  H01L29/78696

    摘要： A field effect transistor having a gate structure comprising a high-K dielectric layer, a gate electrode located on the high-K dielectric layer, and an interfacial layer located in between the high-K dielectric layer and a channel region of the field effect transistor. The interfacial layer comprises a layer of SiO2 containing a regrowth inhibiting agent. A method of forming the gate structure includes forming a gate stack comprising, in order: a SiO2 layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2 layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing a regrowth inhibiting agent into the SiO2 layer and then annealing the gate structure. The presence of the regrowth inhibiting agent in the SiO2 interfacial layer inhibits regrowth of the SiO2 layer into the channel region during the annealing step.

    摘要翻译： 具有栅极结构的场效应晶体管包括高K电介质层，位于高K电介质层上的栅电极以及位于高K电介质层与场效应晶体管的沟道区之间的界面层 。 界面层包含含有再生长抑制剂的SiO 2层。 形成栅极结构的方法包括：形成栅叠层，其顺序包括：与场效应晶体管的沟道区相邻的SiO 2层; SiO2层上的高K电介质层; 以及在高K电介质层上的栅电极。 该方法还包括将再生长抑制剂引入SiO 2层中，然后对栅极结构进行退火。 在SiO 2界面层中再生抑制剂的存在在退火步骤期间抑制SiO 2层进入沟道区的再生长。

    Gate structure for field effect transistor
    9.
    发明授权
    Gate structure for field effect transistor 有权
    场效应晶体管的栅极结构

    公开(公告)号：US08518783B2

    公开(公告)日：2013-08-27

    申请号：US12989521

    申请日：2009-04-27

    申请人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    发明人： Markus Mueller ,  Guillaume Boccardi ,  Jasmine Petry

    IPC分类号： H01L21/336

    CPC分类号： H01L21/26506 ,  H01L21/28158 ,  H01L21/28176 ,  H01L21/31155 ,  H01L21/32155 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

    摘要： A field effect transistor having a gate structure that comprises an interfacial layer positioned in between the transistor channel region and a high-K dielectric layer of the gate stack. The interfacial layer comprises AlxSiyOz, which has a higher relative dielectric constant value than SiO2. A method of forming the gate structure of a field effect transistor. The method includes forming a gate stack comprising, in order: a SiO2-based layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2-based layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing Al into the SiO2-based layer to form an AlxSiyOz interfacial layer in between the high-K dielectric layer and the channel region. A heating step to allows Al introduced into channel region to diffuse out of the channel region into the interfacial layer.

    摘要翻译： 具有栅极结构的场效应晶体管包括位于晶体管沟道区域和栅极叠层的高K电介质层之间的界面层。 界面层包含Al x Se y O z，其比SiO 2具有更高的相对介电常数值。 一种形成场效应晶体管的栅极结构的方法。 该方法包括形成栅极堆叠，其顺序包括：与场效应晶体管的沟道区相邻的基于SiO 2的层; 在SiO 2基层上的高K电介质层; 以及在高K电介质层上的栅电极。 该方法还包括将Al引入SiO 2基层中以在高K电介质层和沟道区之间形成Al x Se y O z界面层。 加热步骤，允许引入通道区域的Al扩散到沟​​道区域内进入界面层。

    SENSOR DEVICE AND MANUFACTURING METHOD
    10.
    发明申请
    SENSOR DEVICE AND MANUFACTURING METHOD 审中-公开
    传感器和制造方法

    公开(公告)号：US20120024700A1

    公开(公告)日：2012-02-02

    申请号：US13190623

    申请日：2011-07-26

    申请人： Guillaume Boccardi ,  Magali Huguette Alice Lambert

    发明人： Guillaume Boccardi ,  Magali Huguette Alice Lambert

    IPC分类号： G01N27/327 ,  H01L21/02 ,  G01N27/30

    CPC分类号： G01N27/4145

    摘要： Disclosed is a sensor device (10) comprising a substrate (100) carrying a sensing element (110), and a metallization stack on said substrate for providing interconnections to said sensing element, the metallization stack comprising a plurality of patterned metal layers (130a-d) separated by insulating layers (120a-d), wherein a first metal layer (130c) comprises an electrode portion (16) conductively connected to the sensing element, and a further metal layer (130d) facing the first metal layer comprises a reference electrode portion (18), the electrode portion and the reference electrode portion being separated by a fluid channel (14) accessible from the top of the metallization stack. A method of manufacturing such a sensor device is also disclosed.

    摘要翻译： 公开了一种传感器装置（10），其包括承载感测元件（110）的基板（100）和在所述基板上的金属化叠层，用于提供与所述感测元件的互连，所述金属化堆叠包括多个图案化金属层（130a- d）由绝缘层（120a-d）分开，其中第一金属层（130c）包括导电地连接到感测元件的电极部分（16），并且面向第一金属层的另外的金属层（130d）包括参考 电极部分（18），电极部分和参考电极部分由可从金属化堆叠的顶部接近的流体通道（14）分开。 还公开了一种制造这种传感器装置的方法。