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    FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY
    1.
    发明申请
    FLEXIBLE WEAR MANAGEMENT FOR NON-VOLATILE MEMORY 有权
    非易失性存储器的灵活磨损管理

    公开(公告)号：US20140143474A1

    公开(公告)日：2014-05-22

    申请号：US13682885

    申请日：2012-11-21

    申请人： Prashant S. Damle ,  Robert W. Faber ,  Ningde Xie

    发明人： Prashant S. Damle ,  Robert W. Faber ,  Ningde Xie

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/7211

    摘要： Systems and methods of memory cell wear management that can achieve a more uniform distribution of write cycles across a memory cell address space. The systems and methods allow physical addresses of memory cells subjected to a high number of write cycles to be swapped with physical addresses of memory cells subjected to a lower number of write cycles. The physical address of a group of memory cells is a “hot address” if the write cycle count for that memory cell group exceeds a specified threshold. If the write cycle count for a group of memory cells does not exceed the specified threshold, then the physical address of that memory cell group is a “cold address”. The systems and methods allow the specified threshold of write cycle counts to be dynamically incremented to assure that cold addresses are available for swapping with hot addresses in the memory cell address space.

    摘要翻译： 可以实现跨存储器单元地址空间的写周期更均匀分布的存储器单元磨损管理的系统和方法。 这些系统和方法允许经受大量写入周期的存储器单元的物理地址与经受较少写入周期的存储器单元的物理地址交换。 如果该存储单元组的写周期计数超过指定的阈值，则一组存储单元的物理地址是“热地址”。 如果一组存储单元的写周期计数不超过指定的阈值，则该存储单元组的物理地址为“冷地址”。 系统和方法允许指定的写周期计数阈值动态增加，以确保冷地址可用于与存储单元地址空间中的热地址进行交换。

    ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMORY CELL BEFORE ESTABLISHING VOLTAGE DIFFERENTIAL TO PERMIT READING OF CELL
    2.
    发明申请
    ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMORY CELL BEFORE ESTABLISHING VOLTAGE DIFFERENTIAL TO PERMIT READING OF CELL 有权
    在建立电压差异到容许读取单元之前，至少分开存储单元的本地线或列电路

    公开(公告)号：US20140016406A1

    公开(公告)日：2014-01-16

    申请号：US13995230

    申请日：2012-06-06

    申请人： Doyle Rivers ,  Prashant S. Damle ,  Raymond W. Zeng

    发明人： Doyle Rivers ,  Prashant S. Damle ,  Raymond W. Zeng

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0004 ,  G11C7/02 ,  G11C13/004

    摘要： An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.

    摘要翻译： 实施例可以包括对存储器件的存储器单元本地的本地行和列电路。 在本地行电路和本地列电路之间的电压差建立期间，本地行电路或本地列电路可以至少部分地与存储器件的至少一个剩余部分电隔离， 允许在存储器单元的读取期间读取存储器单元。 读取可能在建立电压差之后发生。 在不脱离本实施例的情况下，可以进行许多变化，修改和替换。

    Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell
    5.
    发明授权
    Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell 有权
    至少部分地在建立电压差之前隔离存储单元的本地行或列电路，以允许读取单元

    公开(公告)号：US09030906B2

    公开(公告)日：2015-05-12

    申请号：US13995230

    申请日：2012-06-06

    申请人： Doyle Rivers ,  Prashant S. Damle ,  Raymond W. Zeng

    发明人： Doyle Rivers ,  Prashant S. Damle ,  Raymond W. Zeng

    IPC分类号： G11C8/00 ,  G11C13/00 ,  G11C7/02

    CPC分类号： G11C13/0004 ,  G11C7/02 ,  G11C13/004

    摘要： An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.

    摘要翻译： 实施例可以包括对存储器件的存储器单元本地的本地行和列电路。 在本地行电路和本地列电路之间的电压差建立期间，本地行电路或本地列电路可以至少部分地与存储器件的至少一个剩余部分电隔离， 允许在存储器单元的读取期间读取存储器单元。 读取可能在建立电压差之后发生。 在不脱离本实施例的情况下，可以进行许多变化，修改和替换。

    Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory
    7.
    发明申请
    Techniques Associated with Protecting System Critical Data Written to Non-Volatile Memory 审中-公开
    与保护系统关键数据相关的技术写入非易失性存储器

    公开(公告)号：US20140089561A1

    公开(公告)日：2014-03-27

    申请号：US13627407

    申请日：2012-09-26

    申请人： Kiran Pangal ,  Ravi H. Motwani ,  Prashant S. Damle

    发明人： Kiran Pangal ,  Ravi H. Motwani ,  Prashant S. Damle

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F11/1012 ,  G06F12/0238 ,  G06F2212/1032 ,  G06F2212/1041 ,  G06F2212/403 ,  G06F2212/7202 ,  G06F2212/7207 ,  G11C16/10 ,  G11C16/3459 ,  G11C16/349

    摘要： Examples are disclosed for techniques associated with protecting system critical data written to non-volatile memory. In some examples, system critical data may be written to a non-volatile memory using a first data protection scheme. User data that includes non-system critical data may also be written to the non-volatile memory using a second data protection scheme. For these examples, both data protection schemes may have a same given data format size. Various examples are provided for use of the first data protection scheme that may provide enhanced protection for the system critical data compared to protection provided to user data using the second data protection scheme. Other examples are described and claimed.

    摘要翻译： 公开了与保护写入非易失性存储器的系统关键数据相关的技术的示例。 在一些示例中，可以使用第一数据保护方案将系统关键数据写入非易失性存储器。 包括非系统关键数据的用户数据也可以使用第二数据保护方案写入非易失性存储器。 对于这些示例，两个数据保护方案可以具有相同的给定数据格式大小。 为使用第一数据保护方案提供了各种示例，该方案可以与使用第二数据保护方案提供给用户数据的保护相比提供对系统关键数据的增强保护。 其他的例子被描述和要求保护。

    ERROR CORRECTION IN NON_VOLATILE MEMORY
    10.
    发明申请
    ERROR CORRECTION IN NON_VOLATILE MEMORY 有权
    NON_VOLATILE MEMORY中的错误修正

    公开(公告)号：US20150220387A1

    公开(公告)日：2015-08-06

    申请号：US14126310

    申请日：2013-09-27

    申请人： Zion S. KWOK ,  Ravi H. MOTWANI ,  Kiran PANGAL ,  Prashant S. DAMLE

    发明人： Zion S. Kwok ,  Ravi H. Motwani ,  Kiran Pangal ,  Prashant S. Damle

    IPC分类号： G06F11/10 ,  H03M13/15 ,  G11C29/52

    CPC分类号： G06F11/1068 ,  G06F11/10 ,  G06F11/1044 ,  G06F11/108 ,  G06F12/00 ,  G06F2212/7207 ,  G11C29/52 ,  H03M13/1515 ,  H03M13/152

    摘要： Apparatus, systems, and methods for error correction in memory are described. In one embodiment, a memory controller comprises logic to receive a read request for data stored in a memory, retrieve the data and at least one associated error correction codeword, wherein the data and an associated error correction codeword is distributed across a plurality of memory devices in memory, apply a first error correction routine to decode the error correction codeword retrieved with the data and in response to an uncorrectable error in the error correction codeword, apply a second error correction routine to the plurality of devices in memory. Other embodiments are also disclosed and claimed.

    摘要翻译： 描述了存储器中用于纠错的装置，系统和方法。 在一个实施例中，存储器控制器包括接收对存储在存储器中的数据的读取请求的逻辑，检索数据和至少一个相关联的纠错码字，其中数据和相关联的纠错码字分布在多个存储器件 在存储器中，应用第一纠错程序来解码用数据检索的纠错码字，并响应错误校正码字中的不可校正错误，对存储器中的多个设备应用第二纠错例程。 还公开并要求保护其他实施例。