公开(公告)号：US20150311271A1

公开(公告)日：2015-10-29

申请号：US14451462

申请日：2014-08-05

Applicant: QUALCOMM Incorporated

Inventor： Mete ERTURK ,  Ravindra Vaman SHENOY ,  Kwan-yu LAI ,  Donald William KIDWELL, JR. ,  Jitae KIM ,  Jon Bradley LASITER

IPC: H01L49/02 ,  H01F27/24

CPC classification number: H01L28/10 ,  H01F17/0013 ,  H01F27/24 ,  H01F2017/004 ,  H01L23/5227 ,  H01L23/525 ,  H01L23/645 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/12105 ,  H01L2924/18162 ,  H01L2924/19042

Abstract: One or more high-inductance, high-quality factor (Q) three-dimensional inductors, for example, solenoid or toroid inductors with small form factors, are provided in an integrated circuit package, such as an integrated fanout package.

Abstract translation: 一个或多个高感度，高品质因子（Q）三维电感器，例如具有小形状因数的螺线管或环形电感器，被提供在集成电路封装中，例如集成扇出封装。

公开(公告)号：US20170125512A1

公开(公告)日：2017-05-04

申请号：US15375137

申请日：2016-12-11

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie YUN ,  Daeik Daniel KIM ,  Chengjie ZUO ,  Jonghae KIM ,  Mario Francisco VELEZ ,  Donald William KIDWELL JR ,  Jon Bradley LASITER ,  Kwan-Yu LAI ,  Jitae KIM ,  Ravindra Vaman SHENOY

IPC: H01L49/02

CPC classification number: H01L28/90 ,  H01G4/012 ,  H01G4/33 ,  H01L21/28282 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5223 ,  H01L27/0805 ,  H01L27/12 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.

公开(公告)号：US20150228712A1

公开(公告)日：2015-08-13

申请号：US14177072

申请日：2014-02-10

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie YUN ,  Daeik Daniel KIM ,  Chengjie ZUO ,  Jonghae KIM ,  Mario Francisco VELEZ ,  Donald William KIDWELL ,  Jon Bradley LASITER ,  Kwan-Yu LAI ,  Jitae KIM ,  Ravindra Vaman SHENOY

IPC: H01L49/02 ,  H01L23/48

CPC classification number: H01L28/90 ,  H01G4/012 ,  H01G4/33 ,  H01L21/28282 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5223 ,  H01L27/0805 ,  H01L27/12 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.

Abstract translation: 提供的空间效率电容器具有比传统设计更高的品质因数，并且改善了从直通玻璃通孔（TGV）到电介质的电能的耦合。 例如，提供了具有非矩形横截面的TGV，其中TGV的一端耦合到第一金属板。 在第一金属板上形成电介质材料。 第二金属板以与第一金属板的至少一部分重叠以形成电介质材料的至少一个重叠区域的方式形成在电介质材料上。 重叠区域的周边的至少一部分是非平面的。 重叠区域可以形成为环形的多个部分中的大致四分之一环形的闭环形状和/或大致一半的环形形状。

公开(公告)号：US20170086295A1

公开(公告)日：2017-03-23

申请号：US14859320

申请日：2015-09-20

Applicant: QUALCOMM Incorporated

Inventor： Mete ERTURK ,  Farsheed MAHMOUDI ,  James Thomas DOYLE ,  Ravindra Vaman SHENOY ,  Jitae KIM

IPC: H05K1/16 ,  H05K1/11 ,  H05K3/40 ,  H05K3/30

Abstract: An integrated circuit device, such as a system-on-a-chip (SOC) device that includes an integrated or embedded voltage regulator, comprises an integrated capacitor and an integrated inductor having a magnetic core that can be fabricated in the same process as the capacitive structure of the integrated capacitor.

公开(公告)号：US20160163443A1

公开(公告)日：2016-06-09

申请号：US14743623

申请日：2015-06-18

Applicant: QUALCOMM Incorporated

Inventor： Mete ERTURK ,  Ravindra Vaman SHENOY ,  Kwan-yu LAI ,  Jitae KIM ,  Donald William KIDWELL JR. ,  Jon Bradley LASITER ,  James Thomas DOYLE ,  Omar James BCHIR

IPC: H01F27/28 ,  H01F41/14 ,  H05K1/18 ,  H01F41/02 ,  H05K1/11 ,  H01F27/24 ,  H01F1/147

CPC classification number: H01F27/2804 ,  H01F1/14708 ,  H01F5/00 ,  H01F17/0033 ,  H01F27/24 ,  H01F41/02 ,  H01F41/046 ,  H01F41/14 ,  H01F2017/002 ,  H01F2017/0066 ,  H01F2027/2809 ,  H01L23/49822 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/111 ,  H05K1/165 ,  H05K1/182 ,  H05K2201/10166 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An inductor can include a first substrate, a magnetic piece, and a conductor. The first substrate can be formed within a second substrate. The magnetic piece can be connected to a first side of the first substrate. The conductor can be formed within the second substrate, on the second substrate, or both. The conductor can have an input and an output. The conductor can be configured to surround the first substrate without being in contact with the first substrate and without being in contact with the magnetic piece.

Abstract translation: 电感器可以包括第一衬底，磁片和导体。 第一基板可以形成在第二基板内。 磁片可以连接到第一衬底的第一侧。 导体可以形成在第二基板内，第二基板上，或两者上。 导体可以具有输入和输出。 导体可以被配置为围绕第一基板而不与第一基板接触并且不与磁片接触。