-
公开(公告)号：US5179512A
公开(公告)日：1993-01-12
申请号：US761523
申请日：1991-09-18
CPC分类号： H02M7/217 , H01F27/2804 , H02M3/33592 , H01F2027/2861 , Y02B70/1433 , Y02B70/1441 , Y02B70/1475 , Y02P80/112
摘要： A resonant converter, including a transformer for separating a high-voltage (primary) side from a relatively low-voltage (secondary) side, has at least one synchronous rectifier and an auxiliary sense winding coupled to the gate thereof. The input capacitances of the synchronous rectifiers are reflected to the primary side and the secondary side by the square of the ratio of the number of auxiliary sense winding turns to the number of primary andsecondary winding turns, respectively, thereby reducing the required size of the discrete resonant capacitor. In one embodiment, a gate bias voltage approximately equal to the device threshold voltage is applied to the gate of the synchronous rectifiers. The auxiliary sense windings are etched into a conductive film pattern of the secondary windings. The auxiliary sense windings provide nearly identical secondary and gate drive voltages so that the synchronous rectifiers are gated substantially at the zero-voltage crossings of the secondary winding voltages. The result is a substantially lossless gate drive for synchronous rectifiers in high power density resonant converters.
摘要翻译： 包括用于将高压（初级）侧与相对低压（次级）侧分离的变压器的谐振转换器具有至少一个同步整流器和耦合到其栅极的辅助感测绕组。 同步整流器的输入电容分别通过辅助感测绕组匝数与初级绕组匝数和次级绕组匝数之比的平方反射到初级侧和次级侧，从而减小了所需的尺寸 离散谐振电容器。 在一个实施例中，大约等于器件阈值电压的栅极偏置电压被施加到同步整流器的栅极。 辅助感测绕组被蚀刻成次级绕组的导电膜图案。 辅助感测绕组提供几乎相同的次级和栅极驱动电压，使得同步整流器基本上在次级绕组电压的零电压交叉处门控。 结果是在高功率密度谐振转换器中同步整流器的基本无损栅极驱动。
-
公开(公告)号：US5570074A
公开(公告)日：1996-10-29
申请号：US453229
申请日：1995-05-30
CPC分类号： H01F17/0006 , H01F17/043 , H01F27/2804
摘要： A transformer having a very low, predetermined leakage inductance includes an elongate dielectric laminate having two surfaces. A primary winding having a pattern conformal to the configuration of the laminate is disposed on one surface and extends substantially the length of the laminate. The laminate has at least one secondary winding disposed on its other surface. The laminate is rolled with a dielectric layer about a cylinder, and the primary and secondary windings are patterned such that the primary and secondary windings comprise interleaved winding layers with the dielectric layer disposed between each of the winding layers. The rolled laminate, dielectric layer, and windings are contained within a cylindrical magnetic pot core. The result is a transformer having tightly interleaved primary and secondary windings and, therefore, a very low leakage inductance. In addition, the distance between adjacent primary and secondary turns is fixed by the thickness of the dielectric layer; hence, the leakage inductance is highly predictable.
摘要翻译： 具有非常低的预定的漏电感的变压器包括具有两个表面的细长介电层压板。 具有与层压体的构造一致的图案的初级绕组设置在一个表面上并且基本上延伸层压体的长度。 层压体具有设置在其另一表面上的至少一个次级绕组。 层叠体用围绕圆柱体的介电层卷起，并且初级和次级绕组被图案化，使得初级和次级绕组包括交替的绕组层，其中介电层设置在每个绕组层之间。 轧制的层压体，电介质层和绕组包含在圆柱形磁性罐芯内。 结果是具有紧密交错的初级和次级绕组的变压器，因此具有非常低的漏电感。 此外，相邻的主匝和次级匝之间的距离由电介质层的厚度固定; 因此，漏电感是高度可预测的。
-
3.发明授权
公开(公告)号：US5291173A
公开(公告)日：1994-03-01
申请号：US838958
申请日：1992-02-21
CPC分类号： H01F17/0006 , H01F30/10 , H01F2027/2861
摘要： A high-frequency, low-profile transformer having at least one pair of magnetic poles includes a primary winding having a z-folded, continuous primary conductive film with a generally serpentine configuration disposed on a primary dielectric membrane and further includes a z-folded, continuous secondary winding constructed from a plurality of secondary conductive film portions disposed on a secondary dielectric membrane. Each of the secondary conductive film portions is configured to form a single continuous path enclosing each of the magnetic poles in such manner that each path encloses one pole of each pair of the magnetic poles of each adjacent layer of the secondary winding. Each path thus continues along a respective fold of the winding stack. The secondary winding layers are interleaved with the primary winding layers and electrically connected together. In one preferred embodiment, the transformer has two pairs of magnetic poles, and each path formed by each secondary conductive film has a shape characterized as two generally ovoid portions connected together at a relatively wide midportion. Low-resistance conductive bridges are used to electrically connect the secondary conductive film portions together along alternate folds of the winding stack.
摘要翻译： 具有至少一对磁极的高频，低剖面变压器包括具有z形折叠的连续主导电膜的初级绕组，其具有设置在主介电膜上的大致蛇形结构，并且还包括z形折叠的， 由设置在第二电介质膜上的多个次级导电膜部分构成的连续次级绕组。 每个次级导电膜部分被构造成形成围绕每个磁极的单个连续路径，使得每个路径包围次级绕组的每个相邻层的每对磁极的一个极。 因此，每个路径沿着绕组的相应折叠继续。 次级绕组层与初级绕组层交错并电连接在一起。 在一个优选实施例中，变压器具有两对磁极，并且由每个次级导电膜形成的每条路径具有以相对宽的中间部分连接在一起的两个大致卵形部分的形状。 使用低电阻导电桥将次级导电膜部分沿着绕组的交替折叠电连接在一起。
-
公开(公告)号：US5084958A
公开(公告)日：1992-02-04
申请号：US645758
申请日：1991-01-25
申请人： Alexander J. Yerman , Khai D. Ngo
发明人： Alexander J. Yerman , Khai D. Ngo
IPC分类号： H01F27/28
CPC分类号： H01F27/2804 , H01F2027/2861 , Y10T29/4902 , Y10T29/49073
摘要： A conductive film magnetic component such as an inductor or transformer includes a conductive film winding having a generally serpentine configuration when disposed in a plane. This film is folded to form a stack of layers with each "layer" comprising part of a winding turn and with successive "layers" connected at the folds via the continuous conductive film. The conductive film may be self-supporting and coated with a dielectric layer or may be disposed on a dielectric membrane. The film and membrane are preferably patterned photolithographically.
摘要翻译： 诸如电感器或变压器的导电膜磁性部件包括当布置在平面中时具有大致蛇形结构的导电膜绕组。 该膜被折叠以形成一叠层，每个“层”包括绕组匝的一部分，并且连续的“层”通过连续导电膜连接在折叠处。 导电膜可以是自支撑的并且涂覆有电介质层，或者可以设置在电介质膜上。 薄膜和膜优选是光刻图案。
-
公开(公告)号：US4764485A
公开(公告)日：1988-08-16
申请号：US617
申请日：1987-01-05
IPC分类号： B23K26/00 , B26F1/31 , B29C59/14 , H01L21/311 , H01L23/538 , H05K3/00 , C23F1/02 , B44C1/22
CPC分类号： H05K3/0041 , B23K26/0006 , B23K26/362 , B26F1/31 , B29C59/14 , H01L21/31127 , H01L23/5389 , H05K3/0038 , B23K2201/34 , B23K2203/08 , B23K2203/12 , B23K2203/172 , B23K2203/26 , B23K2203/42 , B23K2203/50 , H01L2924/0002 , H05K2203/0554 , H05K2203/107 , H05K3/0055 , Y10S148/091 , Y10S148/092 , Y10S148/093 , Y10S148/094 , Y10S148/106 , Y10S438/94 , Y10S438/945
摘要： A method for producing a hole in a polymer film includes the steps of depositing a conductive layer onto the polymer film and irradiating a spot on the layer with a burst of focused laser energy at a level sufficient to form an opening in the film and, subsequently, plasma etching the film so as to form a hole of desired depth in the polymer film underlying the opening in the conductive layer. This method is particularly applicable to the formation of multichip intergrated circuit packages in which a plurality of chips formed in a semiconductor wafer are coated with a polymer film covering the chips and the substrates. The holes are provided for the purpose of interconnecting selected chip contact pads via a deposited conductive layer which overlies the film and fills the holes.
摘要翻译： 在聚合物膜中制造孔的方法包括以下步骤：在聚合物膜上沉积导电层，并以聚焦激光能量的突发照射该层上的斑点，其水平足以在膜中形成开口，随后 等离子体蚀刻膜，以在导电层中的开口下方的聚合物膜中形成所需深度的孔。 该方法特别适用于多芯片集成电路封装的形成，其中形成在半导体晶片中的多个芯片涂覆有覆盖芯片和基板的聚合物膜。 这些孔被提供用于通过覆盖在膜上并填充孔的沉积的导电层互连所选择的芯片接触焊盘。
-
6.发明授权Semiconductor element having a polymeric protective coating and glass coating overlay 失效具有聚合物保护涂层和玻璃涂层覆盖层的半导体元件
公开(公告)号：US4017340A
公开(公告)日：1977-04-12
申请号：US601839
申请日：1975-08-04
申请人： Alexander J. Yerman
发明人： Alexander J. Yerman
CPC分类号： H01L21/56 , H01L23/291 , H01L23/296 , H01L23/3171 , H01L23/3192 , H01L2924/0002 , H01L2924/10156 , H01L2924/12044
摘要： A multilayer passivation-encapsulation for a semiconductor element is provided by a suitable polymer layer disposed on the device and overcoated with a glass layer for hermeticity.
摘要翻译： 用于半导体元件的多层钝化封装由设置在器件上的合适的聚合物层提供，并且用用于气密的玻璃层覆盖。
-
公开(公告)号：US5206621A
公开(公告)日：1993-04-27
申请号：US548468
申请日：1990-07-02
申请人： Alexander J. Yerman
发明人： Alexander J. Yerman
IPC分类号： H01F27/28
CPC分类号： H01F27/2804 , H01F2027/2861
摘要： A transformer having a barrel winding comprised of flat conductive film conductors is provided with a repeatable winding configuration by employing a dielectric metal laminate as the winding material and by patterning both primary and secondary windings on the same dielectric membrane, thereby fixing the relative positions of the primary winding and secondary winding terminals and conductors.
摘要翻译： 具有由扁平导电膜导体组成的筒形绕组的变压器通过采用电介质金属层压板作为绕组材料并且通过在同一电介质膜上构图初级绕组和次级绕组而设置有可重复的绕组构型，从而固定相对位置 初级绕组和次级绕组端子和导体。
-
公开(公告)号：US5017902A
公开(公告)日：1991-05-21
申请号：US359063
申请日：1989-05-30
IPC分类号： H01F27/28
CPC分类号： H01F27/2804 , H01F2027/2861
摘要： A conductive film magnetic component such as an inductor or transformer includes a conductive film winding having a generally serpentine configuration when disposed in a plane. This film is folded to form a stack of layers with each "layer" comprising part of a winding turn and with successive "layers" connected at the folds via the continuous conductive film. The conductive film may be self-supporting and coated with a dielectric layer or may be disposed on a dielectric membrane. The film and membrane are preferably patterned photolithographically.
摘要翻译： 诸如电感器或变压器的导电膜磁性部件包括当布置在平面中时具有大致蛇形结构的导电膜绕组。 该膜被折叠以形成一叠层，每个“层”包括绕组匝的一部分，并且连续的“层”通过连续导电膜连接在折叠处。 导电膜可以是自支撑的并且涂覆有电介质层，或者可以设置在电介质膜上。 薄膜和膜优选是光刻图案。
-
9.发明授权Screenable power chip mosaics, a method for fabricating large power semiconductor chips 失效可屏蔽电源芯片马赛克，一种制造大功率半导体芯片的方法
公开(公告)号：US4829014A
公开(公告)日：1989-05-09
申请号：US189254
申请日：1988-05-02
申请人： Alexander J. Yerman
发明人： Alexander J. Yerman
IPC分类号： G01R31/26 , H01L21/66 , H01L21/768 , H01L21/82
CPC分类号： H01L22/22 , H01L21/76886 , H01L2924/0002
摘要： An additive process allowing discretionary interconnection of only the acceptable devices on a semiconductor wafer includes screen printing a polyimide layer over the wafer to form vias over all of the device contact pads on the wafer while coating the remainder of the wafer. The devices are then individually tested through the vias and, when a device is determined to be unacceptable according to predetermined specifications, the vias above that device are filled with polyimide. A layer of metal is next deposited over the entire wafer by evaporation and makes electrical contact with only the acceptable devices since the unacceptable devices have been blocked off. The metal layer is thereafter patterned to leave an interconnection pattern wherein only the acceptable devices on the wafer are electrically connected.
-
10.发明授权Fabrication of large power semiconductor composite by wafer interconnection of individual devices 失效通过单个器件的晶片互连制造大功率半导体复合材料
公开(公告)号：US4816422A
公开(公告)日：1989-03-28
申请号：US947151
申请日：1986-12-29
IPC分类号： H01L21/66 , H01L23/528 , H01L23/538 , H01L7/00
CPC分类号： H01L22/22 , H01L23/528 , H01L23/5385 , H01L2924/0002 , Y10S148/093 , Y10S148/162
摘要： A method for fabricating a composite semiconductor from a plurality of substantially identical individual semiconductor devices formed on a common semiconductor wafer includes testing the devices on the wafer to generate a positional mapping of acceptable and non-acceptable devices, dividing the wafer into a plurality of areas of arbitrary size, connecting corresponding contact pads on only the acceptable devices within a given area to each other via common conductive paths which are supported on a dielectric film covering the pads, the film having appropriately located holes filled with conductive material to electrically couple the common conductive paths and the underlying contact pads of only the acceptable devices. The devices within a given area are intercoupled in a manner to form an operational array; single or multiple arrays may be coupled together to form a composite package having common external contacts and heat sink supports.
摘要翻译： 从形成在公共半导体晶片上的多个基本相同的单个半导体器件制造复合半导体的方法包括测试晶片上的器件以产生可接受和不可接受器件的位置映射，将晶片分成多个区域 通过共同的导电路径将一个给定区域内的可接受的设备上的对应的接触焊盘连接在一起，该导电通路支撑在覆盖焊盘的电介质膜上，该膜具有适当定位的孔，填充有导电材料， 导电路径和仅接受的设备的底层接触垫。 给定区域内的装置以形成操作阵列的方式相互配合; 单个或多个阵列可以耦合在一起以形成具有共同的外部触点和散热器支撑件的复合封装。
-
-
-
-
-
-
-
-
-
搜索结果
28 条记录 (耗时 0.024 秒)
