公开(公告)号：US06661056B1

公开(公告)日：2003-12-09

申请号：US10168243

申请日：2002-09-26

申请人： Robert Plikat ,  Wolfgang Feiler

发明人： Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L29/0623 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/7803 ,  H01L29/7832

摘要： The present invention relates to a circuit configuration for protecting against polarity reversal of a DMOS transistor. A charge carrier zone (30) is provided, situated in the drift zone (14) of DMOS transistor (10), made up of individual partial charge carrier zones (32) situated at a distance from one another and connected to one another in a conducting manner, the charge carrier zone (30) having an opposite charge carrier doping from that of the drift zone (14), and being able to be acted upon by a potential that is negative with respect to a potential present at a drain terminal (24) of the DMOS transistor (10), so that a short-circuit current is prevented.

摘要翻译： 本发明涉及一种用于防止DMOS晶体管的极性反转的电路配置。提供了一个电荷载体区（30），位于DMOS晶体管（10）的漂移区（14）中，由各个部分电荷载体 区域（32）彼此间隔一定距离并且以导电方式彼此连接，所述电荷载体区域（30）具有与所述漂移区（14）的载流子相反的电荷载流子，并且能够被起作用 通过相对于存在于DMOS晶体管（10）的漏极端子（24）处的电位为负的电位，使得防止短路电流。

公开(公告)号：US06777748B1

公开(公告)日：2004-08-17

申请号：US10031526

申请日：2002-05-09

申请人： Robert Plikat ,  Wolfgang Feiler

发明人： Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L2976

CPC分类号： F02P3/0435 ,  H01L29/7393

摘要： A bidirectional semiconductor component having two symmetrical MOS transistor structures integrated laterally in a substrate and connected antiserially, their drain terminals being connected to one another. A zone having the same type of conductivity as the drain region yet a higher doping than that of the drain region is situated upstream from a pn junction of one of the MOS transistors in a junction area with the drain region.

摘要翻译： 一种具有两个对称的MOS晶体管结构的双向半导体元件，其侧向集成在基板中并且被连接成反向连接，它们的漏极端子彼此连接。 与漏极区相比具有相同类型的导电性的区域具有比漏极区域更高的掺杂的区域位于与漏极区域的结区域中的一个MOS晶体管的pn结的上游。

公开(公告)号：US07084438B2

公开(公告)日：2006-08-01

申请号：US10474614

申请日：2002-04-03

申请人： Robert Plikat ,  Wolfgang Feiler

发明人： Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L29/32

CPC分类号： H01L29/66363 ,  H01L29/0634 ,  H01L29/102 ,  H01L29/7455 ,  H01L29/749

摘要： A semiconductor power component having an anode contact on the reverse side, an emitter region of a first conductor type on the reverse side, which is connected to the anode contact on the reverse side, a drift zone which is connected to the emitter region that is on the reverse side and extends partially to the front surface, an MOS control structure on the front side, having a control contact positioned in insulated fashion, a cathode contact on a front side which is connected to a source region and a first body region. The drift zone has first and second drift region of a second conductor type and a third drift region of first conductor type. First drift region is a buried region, second drift region connects the front surface to first drift region, and third drift region connects the first and/or second body region to first drift region. The degree of compensation (K(y)) that is ascertainable from the second and third drift region is greater than one and has a maximum in the region of the side of the third drift region facing away from the front surface.

摘要翻译： 在反面具有阳极接触的半导体功率部件，反面侧的第一导体类型的发射极区域，其与反面的阳极接触点相连，漂移区域与发射极区域连接， 在反面上并且部分地延伸到前表面，在前侧具有控制触点，以绝缘方式设置的MOS控制结构，连接到源极区域和第一主体区域的正面上的阴极接触。 漂移区具有第一导体类型的第一和第二漂移区域和第一导体类型的第三漂移区域。 第一漂移区域是掩埋区域，第二漂移区域将前表面连接到第一漂移区域，第三漂移区域将第一和/或第二体区域连接到第一漂移区域。 从第二和第三漂移区域可以确定的补偿度（K（y））大于1，并且在第三漂移区域的远离前表面的一侧的区域中具有最大值。

公开(公告)号：US06674125B2

公开(公告)日：2004-01-06

申请号：US10119515

申请日：2002-04-10

申请人： Wolfgang Feiler ,  Robert Plikat

发明人： Wolfgang Feiler ,  Robert Plikat

IPC分类号： H01L2976

CPC分类号： H01L29/66333 ,  H01L29/1095 ,  H01L29/7395

摘要： A semiconductor power component is described having a rear-side anode contact, a rear-side emitter region of a first conductivity type, which is connected to the rear-side anode contact, a drift region, which is connected to the rear-side emitter region and partially extends to the front-side surface, a front-side MOS control structure, and a front-side cathode contact, which is connected to the source region and the body region. The drift region includes a first drift region of the second conductivity type, a second drift region of the second conductivity type, and a third drift region of the first conductivity type. The first drift region is a buried region. The second drift region connects the front-side surface to the first drift region. The third drift region borders on a body region and connects the front side surface to the first drift region. The degree of compensation to be determined from the second and third drift region is greater than one and has a maximum in the area of the side of the third drift region that is facing away from the front-side surface. The present invention also creates a corresponding manufacturing method.

摘要翻译： 描述了一种半导体功率元件，其具有后侧阳极触点，连接到后侧阳极触点的第一导电类型的后侧发射极区域，漂移区域，其连接到后侧发射极 并且部分地延伸到前侧表面，前侧MOS控制结构和前侧阴极接触件，其连接到源区域和主体区域。 漂移区域包括第二导电类型的第一漂移区域，第二导电类型的第二漂移区域和第一导电类型的第三漂移区域。 第一漂移区是埋藏区。 第二漂移区域将前侧表面连接到第一漂移区域。 第三漂移区域与身体区域相邻并且将前侧表面连接到第一漂移区域。 从第二和第三漂移区域确定的补偿程度大于1，并且在第三漂移区域的背离前侧表面的一侧的面积中具有最大值。 本发明还产生相应的制造方法。

公开(公告)号：US20050006758A1

公开(公告)日：2005-01-13

申请号：US10492269

申请日：2002-09-26

申请人： Kuno Wolf ,  Stephan Ernst ,  Robert Plikat ,  Wolfgang Feiler

发明人： Kuno Wolf ,  Stephan Ernst ,  Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L25/18 ,  H01L21/58 ,  H01L23/495 ,  H01L25/04 ,  H01L23/34

CPC分类号： H01L24/49 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48111 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/4912 ,  H01L2224/73265 ,  H01L2224/83138 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method for packaging electronic assemblies and a multiple chip package, at least one power semiconductor chip being applied to a base plate using a first solder, at least one logic chip being applied to the base plate, the logic chip and the base plate being positioned electrically insulated from one another, at least one logic chip being connected to the at least one power semiconductor chip using signal transmission lines, and the electronic assembly including the at least one power semiconductor chip and the at least one logic chip being packaged using a molding compound in order to provide a multiple chip package.

摘要翻译： 一种用于封装电子组件和多芯片封装的方法，使用第一焊料将至少一个功率半导体芯片施加到基板上，至少一个逻辑芯片被施加到基板，逻辑芯片和基板被定位 电绝缘的至少一个逻辑芯片使用信号传输线连接到所述至少一个功率半导体芯片，并且所述电子组件包括所述至少一个功率半导体芯片和所述至少一个逻辑芯片，其使用模制 复合以提供多芯片封装。

公开(公告)号：US07042085B2

公开(公告)日：2006-05-09

申请号：US10492269

申请日：2002-09-26

申请人： Kuno Wolf ,  Stephan Ernst ,  Robert Plikat ,  Wolfgang Feiler

发明人： Kuno Wolf ,  Stephan Ernst ,  Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L23/34

CPC分类号： H01L24/49 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48111 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/4912 ,  H01L2224/73265 ,  H01L2224/83138 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01052 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method for packaging electronic assemblies and a multiple chip package, at least one power semiconductor chip being applied to a base plate using a first solder, at least one logic chip being applied to the base plate, the logic chip and the base plate being positioned electrically insulated from one another, at least one logic chip being connected to the at least one power semiconductor chip using signal transmission lines, and the electronic assembly including the at least one power semiconductor chip and the at least one logic chip being packaged using a molding compound in order to provide a multiple chip package.

摘要翻译： 一种用于封装电子组件和多芯片封装的方法，使用第一焊料将至少一个功率半导体芯片施加到基板上，至少一个逻辑芯片被施加到基板，逻辑芯片和基板被定位 电绝缘的至少一个逻辑芯片使用信号传输线连接到所述至少一个功率半导体芯片，并且所述电子组件包括所述至少一个功率半导体芯片和所述至少一个逻辑芯片，其使用模制 复合以提供多芯片封装。

公开(公告)号：US06949439B2

公开(公告)日：2005-09-27

申请号：US10450222

申请日：2002-03-26

申请人： Peter Flohrs ,  Robert Plikat ,  Wolfgang Feiler

发明人： Peter Flohrs ,  Robert Plikat ,  Wolfgang Feiler

IPC分类号： H01L21/331 ,  H01L29/739 ,  H01L21/8224

CPC分类号： H01L29/66333 ,  H01L29/7395

摘要： A semiconductor power component and a method for producing a semiconductor power component, in particular a vertical NPT-IGBT for ignition applications with a breakdown voltage of less than approx. 1000 V. The semiconductor power component includes a wafer substrate of a first conductive type including a rear-side emitter region of a second conductive type and a front-side drift region of the first conductive type; a rear-side anode contact which is connected to the emitter region and extends partially to the front-side surface; a front-side MOS control structure; and a front-side cathode contact which is connected to a front-side source region and a body region of the front-side MOS control structure. The thickness of the drift region is much larger than the width of the space charge region at a defined breakdown voltage; and the thickness of the rear-side emitter region is greater than 5 μm.

摘要翻译： 半导体功率部件和半导体功率部件的制造方法，特别是用于点火应用的垂直NPT-IGBT，击穿电压小于约。 半导体功率部件包括第一导电类型的晶片衬底，其包括第二导电类型的后侧发射极区域和第一导电类型的前侧漂移区域; 背面阳极接触件，其连接到发射极区域并部分地延伸到前侧表面; 前端MOS控制结构; 以及连接到前侧MOS控制结构的前侧源极区域和主体区域的前侧阴极接触件。 在限定的击穿电压下，漂移区的厚度远大于空间电荷区的宽度; 后侧发射极区域的厚度大于5μm。

公开(公告)号：US07687947B2

公开(公告)日：2010-03-30

申请号：US10577965

申请日：2004-10-29

申请人： Peter Urbach ,  Wolfgang Feiler ,  Thomas Raica ,  Stefan Hornung

发明人： Peter Urbach ,  Wolfgang Feiler ,  Thomas Raica ,  Stefan Hornung

IPC分类号： H02K11/00

CPC分类号： H01L25/072 ,  H01L23/49861 ,  H01L25/071 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： Electric motor (10), in particular for adjusting moving parts in a motor vehicle, comprising an electronic unit (70) with a sandwich construction, which contains a first electrically conductive substrate (71) and a second electric conductive substrate (72), between which power components are located and electrically connected to both substrates (71, 72), and a side (84) of the second substrate (72) facing away from the first substrate (71) is equipped with additional electronic components (56), wherein the first substrate (71) is embodied as a punched grid (44), which together with the second substrate (72) is extrusion coated with a plastic body (95) in such a way that the extensions (97) of the punched grid (44) protrude from the plastic body (95), forming an electrical and/or mechanical interface (98) for connecting additional motor components (99, 38, 40, 104, 102, 80).

摘要翻译： 电动机（10），特别是用于调节机动车辆中的运动部件，包括具有夹层结构的电子单元（70），其包含第一导电基板（71）和第二导电基板（72） 哪个功率部件被定位并电连接到两个基板（71,72），并且第二基板（72）的背离第一基板（71）的侧面（84）配备有附加的电子部件（56），其中 第一基板（71）被实施为冲压格栅（44），其与第二基板（72）一起被挤塑地涂覆有塑料体（95），使得冲孔网格的延伸部（97） 44）从所述塑料体（95）突出，形成用于连接附加的电动机部件（99,38,40,104,102,80）的电气和/或机械接口（98）。

公开(公告)号：US07057240B2

公开(公告)日：2006-06-06

申请号：US10433848

申请日：2002-09-30

申请人： Rainer Topp ,  Horst Meinders ,  Wolfgang Feiler

发明人： Rainer Topp ,  Horst Meinders ,  Wolfgang Feiler

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/402 ,  F02D2041/2065 ,  F02D2041/2075 ,  F02P3/051 ,  H01L29/7395 ,  H01L2924/0002 ,  H03K17/0828 ,  H03K2017/0806 ,  H01L2924/00

摘要： A semiconductor circuit configuration is described, in particular for ignition applications, having a semiconductor power switching device which has a first main terminal, a second main terminal and a control terminal; a clamping diode device which is switched between the first main terminal and the control terminal for clamping an external voltage (VA) which is applied at the first main terminal; the clamping diode device having a first part with a first clamp voltage and a second part with a second clamp voltage (VKL′), the second part being connected in series with the first part; a controllable semiconductor switching device which is connected in parallel with the first part for controllable bridging of the first part, so that either the sum (VKL) of the first and the second clamp voltages, or the second clamp voltage (VKL′) is provided for clamping the external voltage (VA) applied at the first main terminal; and a control circuit for controlling the controllable semiconductor switching device as a function of a predetermined operating state of the semiconductor power switching device.

摘要翻译： 具体地说，对具有第一主端子，第二主端子和控制端子的半导体功率开关装置的点火应用的半导体电路结构进行了说明。 钳位二极管器件，其在第一主端子和控制端子之间切换，用于钳位在第一主端子处施加的外部电压（V SUB）; 所述钳位二极管器件具有第一部分和第二钳位电压，所述第二部分与所述第一部分串联;第二部分，具有第一钳位电压，第二部分具有第二钳位电压（V SUB） 可控半导体开关器件，其与第一部分并联连接，用于第一部分的可控桥接，使得第一和第二钳位电压的和（V SUB）与第二钳位电压的和 提供钳位电压（V SUB）来钳位在第一主端子施加的外部电压（V SUB）; 以及控制电路，用于根据半导体功率开关器件的预定工作状态来控制可控半导体开关器件。

公开(公告)号：US06236068B1

公开(公告)日：2001-05-22

申请号：US09094780

申请日：1998-06-15

申请人： Wolfgang Feiler

发明人： Wolfgang Feiler

IPC分类号： H01L2978

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/7393

摘要： A transistor component and a method of producing the transistor component having at least one insulated-gate electrode and with lateral and vertical current flow. The transistor component is used for low-loss switching of high currents and is optionally designed in bipolar or MOS technology. The component includes a rear contact connected to a substrate across a highly doped region, where the highly doped region has a concentration profile of the dopant atoms that tapers out smoothly into the interior of the component. The highly doped region can be produced by a diffusion process.

摘要翻译： 一种晶体管组件和一种制造具有至少一个绝缘栅电极并具有横向和垂直电流的晶体管组件的方法。 晶体管组件用于高电流的低损耗开关，并且可选地采用双极或MOS技术设计。 该组件包括在高掺杂区域上连接到衬底的后触点，其中高掺杂区域具有平滑地逐渐变细到组件内部的掺杂剂原子的浓度分布。 高掺杂区域可以通过扩散过程产生。