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公开(公告)号：US11417379B2
公开(公告)日：2022-08-16
申请号：US17081678
申请日：2020-10-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Alan Kalitsov , Bhagwati Prasad , Derek Stewart
Abstract: A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.
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公开(公告)号：US20200006432A1
公开(公告)日：2020-01-02
申请号：US16021804
申请日：2018-06-28
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Michael K. Grobis , Derek Stewart , Bruce D. Terris
Abstract: An apparatus is provided that includes a bit line above a substrate, a word line above the substrate, and a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a reversible resistance-switching memory element coupled in series with an isolation element. The isolation element includes a first selector element coupled in series with a second selector element. The first selector element includes a first snapback current, and the second selector element includes a second snapback current lower than the first snapback current.
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公开(公告)号：US10388646B1
公开(公告)日：2019-08-20
申请号：US15996738
申请日：2018-06-04
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Derek Stewart , Daniel Bedau , Michael Grobis , Christopher J. Petti
Abstract: A surge protection device contains a first electrode, a second electrode electrically connected to electrical ground, and a field-induced switching component electrically contacting the first electrode and the second electrode. The field-induced switching component can include a correlated-electron material or a volatile conductive bridge.
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公开(公告)号：US12106790B2
公开(公告)日：2024-10-01
申请号：US17656306
申请日：2022-03-24
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Alan Kalitsov , Derek Stewart , Ananth Kaushik , Gerardo Bertero
CPC classification number: G11C11/161 , G01R33/093 , G11C11/1673 , G11C11/1675 , H01F10/3286 , H10B61/00 , H10N50/10 , H10N50/80 , H10N50/85
Abstract: A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device.
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公开(公告)号：US20200321353A1
公开(公告)日：2020-10-08
申请号：US16886179
申请日：2020-05-28
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Alan Kalitsov , Derek Stewart , Daniel Bedau , Gerardo Bertero
IPC: H01L27/11585 , G11C11/22 , H01L29/778 , H01L29/417 , H01L29/51 , H01L21/28
Abstract: A ferroelectric memory device contains a two-dimensional semiconductor material layer having a band gap of at least 1.1 eV and at least one of a thickness of 1 to 5 monolayers of atoms of the semiconductor material or includes a two-dimensional charge carrier gas layer, a source contact contacting a first portion of the two-dimensional semiconductor material layer, a drain contact contacting a second portion of the two-dimensional semiconductor material layer, a ferroelectric memory element located between the source and drain contacts and adjacent to a first surface of the two-dimensional semiconductor material layer, and a conductive gate electrode located adjacent to the ferroelectric memory element.
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Patent Agency Ranking
公开(公告)号：US10290804B2
公开(公告)日：2019-05-14
申请号：US15637357
申请日：2017-06-29
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Ricardo Ruiz , Jeffrey Lille , Mac D. Apodaca , Derek Stewart , Lei Wan , Bruce Terris
Abstract: Resistive memory cells containing nanoparticles are formed between two electrodes. The nanoparticles may be embedded in a matrix or sintered together without a matrix. The memory cells may be projected memory cells or barrier modulated cells. Polymeric ligands may be used to deposit the nanoparticles over a substrate, followed by an optional removal or replacement of the polymeric ligands.
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公开(公告)号：US11411170B2
公开(公告)日：2022-08-09
申请号：US17081557
申请日：2020-10-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Alan Kalitsov , Bhagwati Prasad , Derek Stewart
Abstract: A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.
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公开(公告)号：US12211535B2
公开(公告)日：2025-01-28
申请号：US17656310
申请日：2022-03-24
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Alan Kalitsov , Derek Stewart , Ananth Kaushik , Gerardo Bertero
Abstract: A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device.
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公开(公告)号：US10553647B2
公开(公告)日：2020-02-04
申请号：US16021804
申请日：2018-06-28
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Michael K. Grobis , Derek Stewart , Bruce D. Terris
Abstract: An apparatus is provided that includes a bit line above a substrate, a word line above the substrate, and a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a reversible resistance-switching memory element coupled in series with an isolation element. The isolation element includes a first selector element coupled in series with a second selector element. The first selector element includes a first snapback current, and the second selector element includes a second snapback current lower than the first snapback current.
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公开(公告)号：US10355049B1
公开(公告)日：2019-07-16
申请号：US16021776
申请日：2018-06-28
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Michael K. Grobis , Derek Stewart , Bruce D. Terris
Abstract: An apparatus is provided that includes a bit line above a substrate, a word line above the substrate, and a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a reversible resistance-switching memory element coupled in series with an isolation element. The isolation element includes a first selector element coupled in series with a second selector element.
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