公开(公告)号：US09711231B1

公开(公告)日：2017-07-18

申请号：US15191898

申请日：2016-06-24

Applicant: SanDisk Technologies LLC

Inventor： Chris Yip ,  Philip Reusswig ,  Nian Niles Yang ,  Grishma Shah ,  Abuzer Azo Dogan ,  Biswajit Ray ,  Mohan Dunga ,  Joanna Lai ,  Changyuan Chen

IPC: G11C16/26 ,  G11C16/28 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34 ,  G06F11/10 ,  G11C29/52

CPC classification number: G11C16/28 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/30 ,  G11C16/32

Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. In one aspect, read voltages are set and optimized based on a time period since a last sensing operation. A timing device such as an n-bit digital counter may be provided for each block of memory cells to track the time. The counter is set to all 1's when the device is powered on. When a sensing operation occurs, the counter is periodically incremented based on a clock. When a next read operation occurs, the value of the counter is cross-referenced to an optimal set of read voltage shifts. Each block of cells may have its own counter, where the counters are incremented using a local or global clock.

公开(公告)号：US09679661B1

公开(公告)日：2017-06-13

申请号：US15195492

申请日：2016-06-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zelei Guo ,  Joanna Lai ,  Deepak Raghu

IPC: G11C16/06 ,  G11C16/26 ,  G11C16/04 ,  G11C16/08 ,  G06F11/07 ,  G11C7/06 ,  G11C16/28

CPC classification number: G11C16/26 ,  G06F11/22 ,  G11C7/062 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/28 ,  G11C29/021 ,  G11C29/028 ,  G11C29/12 ,  G11C29/16 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411 ,  G11C2029/1204 ,  G11C2029/5002

Abstract: Performance improvement features can improve the performance of read processes under the right conditions. In order to selectively use the performance improvement features, the system conducts active read sampling to obtain information about bit error rate and then enables the performance improvement feature(s) for future read processes based on the information about bit error rate.

公开(公告)号：US10026488B2

公开(公告)日：2018-07-17

申请号：US15240188

申请日：2016-08-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Phil Reusswig ,  Joanna Lai ,  Deepak Raghu ,  Grishma Shah ,  Nian Niles Yang

IPC: G11C16/34 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G11C16/22 ,  G11C16/26

Abstract: A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

公开(公告)号：US20180181462A1

公开(公告)日：2018-06-28

申请号：US15391455

申请日：2016-12-27

Applicant: SanDisk Technologies LLC

Inventor： Pitamber Shukla ,  Joanna Lai ,  Henry Chin ,  Deepak Raghu ,  Abhilash Kashyap

IPC: G06F11/10 ,  G11C29/52 ,  G11C16/34 ,  G11C16/28 ,  G11C16/10

CPC classification number: G06F11/1068 ,  G11C16/10 ,  G11C16/28 ,  G11C16/3459 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0407

Abstract: Technology is described herein for operating non-volatile storage. In one embodiment, the memory system tracks which adjustments to default values for hard bit read reference voltages are most frequently successful to decode data in non-volatile memory cells. In response to a process that uses only hard bits failing to successfully decode data in a group of the non-volatile memory cells, the memory system attempts to decode the data in the group of non-volatile memory cells using dynamic hard bit read reference voltages and dynamic soft bit read reference voltages that correspond to only a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages. By only using a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages time and power is saved.

公开(公告)号：US10025661B1

公开(公告)日：2018-07-17

申请号：US15391455

申请日：2016-12-27

Applicant: SanDisk Technologies LLC

Inventor： Pitamber Shukla ,  Joanna Lai ,  Henry Chin ,  Deepak Raghu ,  Abhilash Kashyap

IPC: G06F11/00 ,  G06F11/10 ,  G11C29/52 ,  G11C16/34 ,  G11C16/28 ,  G11C16/10

Abstract: Technology is described herein for operating non-volatile storage. In one embodiment, the memory system tracks which adjustments to default values for hard bit read reference voltages are most frequently successful to decode data in non-volatile memory cells. In response to a process that uses only hard bits failing to successfully decode data in a group of the non-volatile memory cells, the memory system attempts to decode the data in the group of non-volatile memory cells using dynamic hard bit read reference voltages and dynamic soft bit read reference voltages that correspond to only a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages. By only using a subset of the most frequently successful adjustments to the default values for the hard bit read reference voltages time and power is saved.

公开(公告)号：US20180053562A1

公开(公告)日：2018-02-22

申请号：US15240188

申请日：2016-08-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Phil Reusswig ,  Joanna Lai ,  Deepak Raghu ,  Grishma Shah ,  Nian Niles Yang

IPC: G11C16/34 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G11C16/22 ,  G11C16/26

CPC classification number: G11C16/3431 ,  G06F11/1068 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427 ,  G11C29/021 ,  G11C29/028 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/0409

Abstract: A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

公开(公告)号：US09846554B1

公开(公告)日：2017-12-19

申请号：US15228910

申请日：2016-08-04

Applicant: SanDisk Technologies LLC

Inventor： Joanna Lai ,  Nian Niles Yang

IPC: G11C16/04 ,  G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0688 ,  G11C29/80

Abstract: A storage system and method for generating block allocation groups based on deterministic data patterns are provided. A storage system is provided comprising a memory comprising a plurality of blocks and a controller. The controller is configured to infer characteristics of the memory from data patterns of data stored in the plurality of blocks; and group the plurality of blocks based on the inferred characteristics of the memory.