公开(公告)号：US20240244844A1

公开(公告)日：2024-07-18

申请号：US18621735

申请日：2024-03-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kartik SONDHI ,  Senaka KANAKAMEDALA

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A method of forming a memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening through the alternating stack, irradiating an upper portion of the memory opening with laser radiation, performing a metal area selective deposition process to selectively grow a vertical stack of tubular metal spacer from physically exposed surfaces of middle and lower sacrificial material layers without growing the tubular metal spacers from upper sacrificial material layers, forming a memory opening fill structure in the memory opening, and replacing the sacrificial material layers with electrically conductive layers.

公开(公告)号：US20240237354A1

公开(公告)日：2024-07-11

申请号：US18613763

申请日：2024-03-22

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kartik SONDHI ,  Senaka KANAKAMEDALA ,  Koichi MATSUNO

IPC: H10B43/27 ,  H01L23/522 ,  H10B43/10

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B43/10

Abstract: A three-dimensional memory device includes: an alternating stack of insulating layers and electrically conductive layers having stepped surfaces in a contact region; memory openings vertically extending through the alternating stack; memory opening fill structures located in the memory openings; a retro-stepped dielectric material portion overlying the stepped surfaces; and a layer contact assembly vertically extending through the retro-stepped dielectric material portion and through a subset of layers in the alternating stack and including: a dielectric pillar structure that is laterally surrounded by the subset of layers in the alternating stack; and a layer contact via structure including a cylindrical conductive material portion that vertically extends through the retro-stepped dielectric material portion and a downward-protruding tubular portion adjoined to a bottom end of the cylindrical conductive portion and having an annular bottom surface that contacts an electrically conductive layer within the subset of layers in the alternating stack.

公开(公告)号：US20240237350A1

公开(公告)日：2024-07-11

申请号：US18534283

申请日：2023-12-08

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kartik SONDHI ,  Roshan Jayakhar TIRUKKONDA ,  Bing ZHOU ,  Senaka KANAKAMEDALA

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a vertical stack of memory elements and a vertical semiconductor channel, and a vertical stack of insulating spacers located at levels of the insulating layers between the memory opening fill structure and the insulating layers. The insulating spacers have different thicknesses such that the thicknesses of the insulating spacers increase with an upward vertical distance from a horizontal plane including a top surface of the substrate.

公开(公告)号：US20240237346A1

公开(公告)日：2024-07-11

申请号：US18355888

申请日：2023-07-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Adarsh RAJASHEKHAR ,  Fei ZHOU ,  Bing ZHOU ,  Senaka KANAKAMEDALA ,  Roshan Jayakhar TIRUKKONDA ,  Kartik SONDHI

IPC: H10B43/27 ,  H01L23/522 ,  H01L23/528 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

Abstract: A method of forming a memory device includes forming an alternating stack of insulating layers including a first insulating material and sacrificial material layers including a first sacrificial material over a substrate, forming a memory opening through the alternating stack, performing a first selective material deposition process that selectively grows a second sacrificial material from physically exposed surfaces of the sacrificial material layers to form a vertical stack of sacrificial material portions; forming a memory opening fill structure in the memory opening, where the memory opening fill structure includes a vertical stack of memory elements and a vertical semiconductor channel, and replacing a combination of the vertical stack of sacrificial material portions and the sacrificial material layers with electrically conductive layers.

公开(公告)号：US20230354609A1

公开(公告)日：2023-11-02

申请号：US18346504

申请日：2023-07-03

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Senaka KANAKAMEDALA ,  Raghuveer S. MAKALA ,  Roshan Jayakhar TIRUKKONDA ,  Kartik SONDHI

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

Abstract: A method of forming a structure includes forming an alternating stack of first material layers and second material layers over a substrate; forming an etch mask material layer containing an opening over the alternating stack; performing a first anisotropic etch process that etches unmasked upper portions of the alternating stack to form a via opening below the opening in the etch mask material layer; forming a combination of a non-conformal cladding liner and a conformal sacrificial spacer layer over the etch mask material layer and in peripheral portions of the via opening; performing a punch-through process that etches a horizontally-extending portion of the conformal sacrificial spacer layer from a bottom portion of the via opening; and vertically extending the via opening by performing a second anisotropic etch process that etches unmasked lower portions of the alternating stack selective to the non-conformal cladding liner and the conformal sacrificial spacer layer.

公开(公告)号：US20230128682A1

公开(公告)日：2023-04-27

申请号：US18145275

申请日：2022-12-22

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kartik SONDHI ,  Raghuveer S. MAKALA ,  Adarsh RAJASHEKHAR ,  Rahul SHARANGPANI ,  Fei ZHOU

IPC: H10B41/27 ,  G11C16/04 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory film. The memory film includes a memory material layer having a straight inner cylindrical sidewall that vertically extends through a plurality of electrically conductive layers within the alternating stack without lateral undulation and a laterally-undulating outer sidewall having outward lateral protrusions at levels of the plurality of electrically conductive layers.

公开(公告)号：US20240064995A1

公开(公告)日：2024-02-22

申请号：US18161439

申请日：2023-01-30

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Adarsh RAJASHEKHAR ,  Raghuveer S. MAKALA ,  Kartik SONDHI ,  Rahul SHARANGPANI ,  Fei ZHOU

IPC: H10B51/20 ,  H10B51/30

CPC classification number: H10B51/20 ,  H10B51/30

Abstract: A ferroelectric memory device includes an alternating stack of insulating layers and composite layers that are interlaced along a vertical direction, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and an inner ferroelectric material layer including a first ferroelectric material, and a vertical stack of electrically-non-insulating material portions located between the inner ferroelectric material layer and the composite layers. Each of the composite layers includes a respective electrically conductive layer and a respective outer ferroelectric material layer including a second ferroelectric material, embedding the respective electrically conductive layer, and contacting a respective electrically-non-insulating material portion.

公开(公告)号：US20220093644A1

公开(公告)日：2022-03-24

申请号：US17543987

申请日：2021-12-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Raghuveer S. MAKALA ,  Kartik SONDHI ,  Ramy Nashed Bassely SAID ,  Senaka KANAKAMEDALA

IPC: H01L27/11582 ,  H01L21/28 ,  H01L27/11556 ,  H01L29/423

Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and comprising a vertical semiconductor channel and a memory film. The memory film includes a contoured blocking dielectric layer including sac-shaped lateral protrusions located at levels of the electrically conductive layers, a tunneling dielectric layer in contact with the vertical semiconductor channel, and a vertical stack of charge storage material portions located within volumes enclosed by the sac-shaped lateral protrusions.

公开(公告)号：US20240064992A1

公开(公告)日：2024-02-22

申请号：US17821012

申请日：2022-08-19

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul SHARANGPANI ,  Kartik SONDHI ,  Raghuveer S. MAKALA ,  Tiffany SANTOS ,  Fei ZHOU ,  Joyeeta NAG ,  Bhagwati PRASAD

IPC: H01L27/11597 ,  H01L27/11587 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/11597 ,  H01L27/11587 ,  H01L29/6684 ,  H01L29/78391

Abstract: A semiconductor memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical stack of discrete ferroelectric material portions and a vertical semiconductor channel. In one embodiment, the discrete ferroelectric material portions include a ferroelectric alloy material of a first dielectric metal oxide material and a second dielectric metal oxide material. In another embodiment, each of the discrete ferroelectric material portions is oxygen-deficient.

公开(公告)号：US20240008281A1

公开(公告)日：2024-01-04

申请号：US17809758

申请日：2022-06-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Kartik SONDHI ,  Adarsh RAJASHEKHAR ,  Fei ZHOU ,  Raghuveer S. MAKALA

IPC: H01L27/11597 ,  H01L27/1159

CPC classification number: H01L27/11597 ,  H01L27/1159

Abstract: A ferroelectric memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening extending vertically through the alternating stack and including laterally-protruding portions at levels of the electrically conductive layers, and a memory opening fill structure located in the memory opening and containing a vertical semiconductor channel and a vertical stack of discrete ferroelectric memory structures located in the laterally-protruding portions of the memory opening. Each of the ferroelectric memory structures includes crystalline ferroelectric material portion and a crystalline template material portion located between a respective electrically conductive layer of the electrically conductive layers and the crystalline ferroelectric material portion.