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公开(公告)号:US10007311B2
公开(公告)日:2018-06-26
申请号:US15237139
申请日:2016-08-15
Applicant: SanDisk Technologies LLC
Inventor: Deepak Raghu , Pao-Ling Koh , Philip Reusswig , Chris Nga Yee Yip , Jun Wan , Yan Li
CPC classification number: G06F1/206 , G06F1/3225 , G06F1/3275 , G06F3/0616 , G06F3/0653 , G06F3/0688 , Y02D10/14
Abstract: A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling may be implemented that considers the memory device's health, usage, or performance (e.g. hot count or bit error rate). Likewise, throttling based on the memory device's health, usage, or performance may utilize the memory device's temperature to optimize throttling time. For example, a test mode matrix (TMM) may be modified to depend on temperature.
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公开(公告)号:US20180046231A1
公开(公告)日:2018-02-15
申请号:US15237139
申请日:2016-08-15
Applicant: SanDisk Technologies LLC
Inventor: Deepak Raghu , Pao-Ling Koh , Philip Reusswig , Chris Nga Yee Yip , Jun Wan , Yan Li
CPC classification number: G06F1/206 , G06F1/3225 , G06F1/3275 , G06F3/0616 , G06F3/0653 , G06F3/0688
Abstract: A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling may be implemented that considers the memory device's health, usage, or performance (e.g. hot count or bit error rate). Likewise, throttling based on the memory device's health, usage, or performance may utilize the memory device's temperature to optimize throttling time. For example, a test mode matrix (TMM) may be modified to depend on temperature.
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公开(公告)号:US09741444B2
公开(公告)日:2017-08-22
申请号:US15483169
申请日:2017-04-10
Applicant: SanDisk Technologies LLC
Inventor: Philip Reusswig , Harish Singidi , Deepak Raghu , Gautam Dusija , Pao-Ling Koh , Chris Avila
CPC classification number: G11C16/3431 , G06F11/1072 , G11C11/5642 , G11C16/26 , G11C16/3422 , G11C16/349 , G11C29/52
Abstract: Methods and systems are provided where non-volatile solid state memory may include selected memory cells coupled to a selected word line and proxy memory cells coupled to a proxy word line. The selected memory cells may be non-adjacent to the proxy memory cells and be selected for a read operation. A read proxy voltage may be applied to the proxy word line when data is read from the selected memory cells. A read disturb may be determined based on a difference between a predetermined value stored in the proxy memory cells and a value read from the proxy memory cells.
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公开(公告)号:US10971199B2
公开(公告)日:2021-04-06
申请号:US16446705
申请日:2019-06-20
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Pao-Ling Koh , Yuheng Zhang , Yan Li
IPC: G11C7/12 , H03K19/173 , G11C16/26 , G11C16/12
Abstract: A non-volatile memory system comprises a memory structure and a control circuit connected to the memory structure. The control circuit is configured to control the non-volatile memory structure to perform memory operations by generating and applying a set of control signals to the non-volatile memory structure The control circuit includes a programmable and reprogrammable microcontroller. For example, the microcontroller includes one or more processors that are programmed using software (e.g., firmware). The use of a programmable processor and software allows for updates and changes to be made easily. Additionally, to reduce the time taken to make some calculations, the microcontroller also includes one or more combinational logic circuits that are in communication with the one or more processors.
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公开(公告)号:US20170213599A1
公开(公告)日:2017-07-27
申请号:US15483169
申请日:2017-04-10
Applicant: SanDisk Technologies LLC
Inventor: Philip Reusswig , Harish Singidi , Deepak Raghu , Gautam Dusija , Pao-Ling Koh , Chris Avila
CPC classification number: G11C16/3431 , G06F11/1072 , G11C11/5642 , G11C16/26 , G11C16/3422 , G11C16/349 , G11C29/52
Abstract: Methods and systems are provided where non-volatile solid state memory may include selected memory cells coupled to a selected word line and proxy memory cells coupled to a proxy word line. The selected memory cells may be non-adjacent to the proxy memory cells and be selected for a read operation. A read proxy voltage may be applied to the proxy word line when data is read from the selected memory cells. A read disturb may be determined based on a difference between a predetermined value stored in the proxy memory cells and a value read from the proxy memory cells.
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公开(公告)号:US09633738B1
公开(公告)日:2017-04-25
申请号:US15195583
申请日:2016-06-28
Applicant: SanDisk Technologies LLC
Inventor: Zelei Guo , Pao-Ling Koh , Henry Chin , Pitamber Shukla , Deepak Raghu , Dana Lee
Abstract: A storage system includes a controller that is configured to make host data inaccessible. To do so, the controller may control power control circuitry to supply pulses to storage locations storing host data. The pulses may include flash write pulses but no erase pulses, or a combination of flash write pulses and erase pulses. If erase pulses are supplied, the number of the erase pulses may be less than the number supplied for performance of a default erase operation.
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