公开(公告)号：US11710794B2

公开(公告)日：2023-07-25

申请号：US17063748

申请日：2020-10-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/02 ,  H01L21/465 ,  H10K59/123 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F1/136277 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78603 ,  H01L29/78693 ,  H01L29/78696 ,  H10K59/123

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US09276128B2

公开(公告)日：2016-03-01

申请号：US14518362

申请日：2014-10-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasutaka Nakazawa ,  Shunsuke Koshioka ,  Takayuki Cho ,  Takahiro Sato

IPC: H01L21/00 ,  H01L29/786 ,  H01L21/4763 ,  H01L21/3213 ,  C23F1/02 ,  C23F1/18 ,  C23F1/26 ,  C09K13/00

CPC classification number: H01L29/7869 ,  C09K13/00 ,  C23F1/02 ,  C23F1/18 ,  C23F1/26 ,  H01L21/32134 ,  H01L21/47635 ,  H01L23/53238 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a first conductive film over a substrate; forming an insulating film over the first conductive film; forming an oxide semiconductor film over the insulating film to overlap with the first conductive film; forming a second conductive film including a metal film containing molybdenum as its main component and a metal film containing copper as its main component over the oxide semiconductor film; and etching the second conductive film by an etchant. At the time of etching the second conductive film by the etchant, the oxide semiconductor film is used as an etching stopper film. In addition, the etchant which can be used for a transistor including the oxide semiconductor film is provided.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：在衬底上形成第一导电膜; 在所述第一导电膜上形成绝缘膜; 在所述绝缘膜上形成氧化物半导体膜以与所述第一导电膜重叠; 在所述氧化物半导体膜上形成包含以钼为主要成分的金属膜和含有铜作为主要成分的金属膜的第二导电膜; 并用蚀刻剂蚀刻第二导电膜。 在通过蚀刻剂蚀刻第二导电膜时，氧化物半导体膜用作蚀刻停止膜。 此外，提供了可用于包括氧化物半导体膜的晶体管的蚀刻剂。

公开(公告)号：US12243943B2

公开(公告)日：2025-03-04

申请号：US18207176

申请日：2023-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02 ,  H01L21/306 ,  H01L21/465 ,  H01L29/04 ,  H01L29/06 ,  H01L29/10 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H10K59/123

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US09741866B2

公开(公告)日：2017-08-22

申请号：US14585918

申请日：2014-12-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki Cho ,  Shunsuke Koshioka ,  Masatoshi Yokoyama ,  Shunpei Yamazaki

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/51 ,  H01L29/49

CPC classification number: H01L29/78693 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

Abstract: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose compositions are different from each other, are stacked in this order is provided over a gate electrode layer. Alternatively, in a staggered transistor having a bottom-gate structure, a protective insulating film is provided between a glass substrate and a gate electrode layer. A metal element contained in the glass substrate has a concentration lower than or equal to 5×1018 atoms/cm3 at the interface between the first gate insulating film and the second gate insulating film or the interface between the gate electrode layer and a gate insulating film.

公开(公告)号：US08932903B2

公开(公告)日：2015-01-13

申请号：US13875563

申请日：2013-05-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Takayuki Cho ,  Shunsuke Koshioka ,  Tetsuya Ohshima ,  Naoya Sakamoto

IPC: H01L21/00 ,  H01L29/66 ,  H05K3/06 ,  H01L27/12

CPC classification number: H01L29/42384 ,  H01L21/44 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/66969 ,  H05K3/06

Abstract: A wiring which is formed using a conductive film containing copper and whose shape is controlled is provided. A transistor including an electrode which is formed in the same layer as the wiring is provided. Further, a semiconductor device including the transistor and the wiring is provided. A resist mask is formed over a second conductive film stacked over a first conductive film; part of the second conductive film and part of the first conductive film are removed with use of the resist mask as a mask so that the first conductive film has a taper angle greater than or equal to 15° and less than or equal to 45°; and the resist mask is removed. The first conductive film contains copper.

Abstract translation: 提供了使用含有铜的导电膜形成并且其形状被控制的布线。 提供了包括与布线形成在同一层中的电极的晶体管。 此外，提供了包括晶体管和布线的半导体器件。 在层叠在第一导电膜上的第二导电膜上形成抗蚀剂掩模; 使用抗蚀剂掩模作为掩模去除第二导电膜的一部分和第一导电膜的一部分，使得第一导电膜具有大于或等于15°且小于或等于45°的锥角; 并且去除抗蚀剂掩模。 第一导电膜含有铜。

公开(公告)号：US09882014B2

公开(公告)日：2018-01-30

申请号：US14549916

申请日：2014-11-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Takahiro Sato ,  Naoya Sakamoto ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/12 ,  H01L29/45

CPC classification number: H01L29/45 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: The semiconductor device includes an oxide semiconductor; a source electrode and a drain electrode in contact with the oxide semiconductor; a gate insulating film over the oxide semiconductor, the source electrode, and the drain electrode; and a gate electrode overlapping the oxide semiconductor, part of the source electrode, and part of the drain electrode with the gate insulating film positioned therebetween. The source electrode and the drain electrode each include a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti), and the thickness of a region of the oxide semiconductor over which neither the source electrode nor the drain electrode is provided is smaller than the thicknesses of regions of the oxide semiconductor over which the source electrode and the drain electrode are provided.

公开(公告)号：US09449819B2

公开(公告)日：2016-09-20

申请号：US14878399

申请日：2015-10-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L21/02 ,  H01L29/786 ,  H01L29/10 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66

CPC classification number: H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US09219165B2

公开(公告)日：2015-12-22

申请号：US14733489

申请日：2015-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/04 ,  H01L29/423 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1368 ,  G02F1/1362 ,  H01L29/06 ,  H01L21/02

CPC classification number: H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

Abstract translation: 晶体管包括层叠有氧化物半导体膜和氧化膜的多层膜，栅极电极和栅极绝缘膜。 多层膜与栅电极重叠，栅极绝缘膜插入其间。 多层膜具有在氧化物半导体膜的底面和氧化物半导体膜的侧面之间具有第一角度的形状，以及氧化物膜的底面与氧化膜的侧面之间的第二角度。 第一个角度是锐角并小于第二个角度。 此外，制造包括这种晶体管的半导体器件。

公开(公告)号：US20150155363A1

公开(公告)日：2015-06-04

申请号：US14549958

申请日：2014-11-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Takahiro Sato ,  Naoya Sakamoto ,  Shunpei Yamazaki

IPC: H01L29/45 ,  H01L21/441 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/45 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: A new semiconductor device in which a metal film containing Cu is used for a transistor including an oxide semiconductor film, and a method for manufacturing the semiconductor device are provided. The semiconductor device includes a transistor including a first gate electrode layer, a first gate insulating film over the first gate electrode layer, an oxide semiconductor film that is provided over the first gate insulating film to overlap the first gate electrode layer, a pair of electrode layers electrically connected to the oxide semiconductor film, a second gate insulating film over the oxide semiconductor film and the pair of electrode layers, and a second gate electrode layer that is over the second gate insulating film to overlap the oxide semiconductor film. The pair of electrode layers includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).

Abstract translation: 提供了一种新的半导体器件，其中含有Cu的金属膜用于包括氧化物半导体膜的晶体管，以及制造半导体器件的方法。 半导体器件包括晶体管，其包括第一栅电极层，第一栅极电极层上的第一栅极绝缘膜，设置在第一栅极绝缘膜上以与第一栅电极层重叠的氧化物半导体膜，一对电极 电连接到氧化物半导体膜的层，氧化物半导体膜上的第二栅极绝缘膜和一对电极层，以及在第二栅极绝缘膜上方与氧化物半导体膜重叠的第二栅极电极层。 一对电极层包括Cu-X合金膜（X是Mn，Ni，Cr，Fe，Co，Mo，Ta或Ti）。

公开(公告)号：US10886413B2

公开(公告)日：2021-01-05

申请号：US16515283

申请日：2019-07-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takahiro Sato ,  Yasutaka Nakazawa ,  Takayuki Cho ,  Shunsuke Koshioka ,  Hajime Tokunaga ,  Masami Jintyou

IPC: H01L29/786 ,  H01L29/10 ,  H01L21/02 ,  H01L21/465 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L21/306 ,  H01L29/66

Abstract: A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.