Process for crystal growth of III-V group compound semiconductor
    2.
    发明授权
    Process for crystal growth of III-V group compound semiconductor 失效
    III-V族化合物半导体的晶体生长工艺

    公开(公告)号:US5603764A

    公开(公告)日:1997-02-18

    申请号:US368872

    申请日:1995-01-05

    CPC分类号: C30B25/02 C30B29/40

    摘要: A process for crystal growth of III-V group compound semiconductor, which comprises pyrolyzing, in a gas phase, a material consisting of an organometallic compound and/or a hydride in the presence of an organic compound containing an oxygen atom-carbon atom direct bond, used as a dopant to grow a III-V group compound semiconductor crystal layer containing at least aluminum, of high electric resistance. Said process can grow a compound semiconductor layer of high electric resistance by the use of a dopant which enables the independent controls of oxygen concentration and aluminum concentration and which has a small effect of oxygen remaining.

    摘要翻译: III-V族化合物半导体的晶体生长方法,其包括在气相中,在含有氧原子 - 碳原子直接键的有机化合物存在下,由有机金属化合物和/或氢化物组成的材料热解 用作掺杂剂以生长具有高电阻的至少含有铝的III-V族化合物半导体晶体层。 所述方法可以通过使用能够独立控制氧浓度和铝浓度并且具有小的氧剩余效果的掺杂剂来生长高电阻的化合物半导体层。

    Thin-film crystal wafer having pn junction and method for fabricating the wafer
    5.
    发明授权
    Thin-film crystal wafer having pn junction and method for fabricating the wafer 有权
    具有pn结的薄膜晶体晶片和用于制造晶片的方法

    公开(公告)号:US07923752B2

    公开(公告)日:2011-04-12

    申请号:US10046739

    申请日:2002-01-17

    IPC分类号: H01L29/735 H01L29/739

    CPC分类号: H01L29/66318 H01L29/205

    摘要: A thin-film crystal wafer having a pn junction includes a first crystal layer of p GaAs, a second crystal layer of n InxAlyGa1−x−yP, the first and second crystal layers being lattice-matched layers that form a heterojunction, and a control layer of a thin-film of InxAlyGa1−x−yP differing in composition from the n InxAlyGa1−x−yP of the second crystal layer is formed at the interface of the heterojunction. The control layer enables the energy discontinuity at the interface of the InxAlyGa1−x−yP/GaAs heterojunction to be set within a relatively broad range of values and thus enables the current amplification factor and the offset voltage to be matched to specification values by varying the energy band gap at the heterojunction.

    摘要翻译: 具有pn结的薄膜晶体晶片包括p GaAs的第一晶体层,n In x Al y Ga 1-x-y P的第二晶体层,第一和第二晶体层是形成异质结的晶格匹配层,以及控制 在异质结的界面处形成与第二晶体层的n In x Al y Ga 1-x-y P的组成不同的In x Al y Ga 1-x-y P的薄膜层。 控制层使InxAlyGa1-x-yP / GaAs异质结的界面处的能量不连续性设定在相对宽的值范围内,从而使电流放大系数和偏移电压能够通过改变 异质结能带隙。

    Method of measuring electrical characteristics of semiconductor wafer
    7.
    发明授权
    Method of measuring electrical characteristics of semiconductor wafer 有权
    测量半导体晶片电气特性的方法

    公开(公告)号:US08610450B2

    公开(公告)日:2013-12-17

    申请号:US13273781

    申请日:2011-10-14

    IPC分类号: G01R31/26

    CPC分类号: G01R31/025 G01R31/129

    摘要: There is provided a method of measuring a leakage current or a dielectric breakdown voltage of a semiconductor wafer that has a base wafer and a buffer layer formed on the base wafer. The method includes providing, on the buffer layer, a plurality of electrodes including a hole injection electrode made of a material that injects a hole into the buffer layer when an electric field is applied thereto, measuring an electric current flowing through a pair of electrodes or a voltage between the electrodes when a voltage or an electric current is applied to the pair of electrodes, the electrodes including at least one hole injection electrode, and measuring a leakage current or a dielectric breakdown voltage caused by hole migration in the semiconductor wafer based on the current flowing through the pair of electrodes or the voltage generated between the pair of the electrodes.

    摘要翻译: 提供了一种测量半导体晶片的漏电流或介电击穿电压的方法,该半导体晶片具有形成在基底晶片上的基底晶片和缓冲层。 该方法包括在缓冲层上设置多个电极,该多个电极包括由施加电场的空穴注入到缓冲层中的材料制成的空穴注入电极,测量流过一对电极的电流或 当对一对电极施加电压或电流时,电极之间的电压,所述电极包括至少一个空穴注入电极,并且测量基于半导体晶片中的空穴迁移引起的漏电流或介电击穿电压,基于 流过该对电极的电流或在一对电极之间产生的电压。