公开(公告)号：US5603764A

公开(公告)日：1997-02-18

申请号：US368872

申请日：1995-01-05

申请人： Yoshinobu Matsuda ,  Masahiko Hata ,  Noboru Fukuhara ,  Toshio Ishihara

发明人： Yoshinobu Matsuda ,  Masahiko Hata ,  Noboru Fukuhara ,  Toshio Ishihara

IPC分类号： H01L21/205 ,  C30B25/02 ,  C30B29/40

CPC分类号： C30B25/02 ,  C30B29/40

摘要： A process for crystal growth of III-V group compound semiconductor, which comprises pyrolyzing, in a gas phase, a material consisting of an organometallic compound and/or a hydride in the presence of an organic compound containing an oxygen atom-carbon atom direct bond, used as a dopant to grow a III-V group compound semiconductor crystal layer containing at least aluminum, of high electric resistance. Said process can grow a compound semiconductor layer of high electric resistance by the use of a dopant which enables the independent controls of oxygen concentration and aluminum concentration and which has a small effect of oxygen remaining.

摘要翻译： III-V族化合物半导体的晶体生长方法，其包括在气相中，在含有氧原子 - 碳原子直接键的有机化合物存在下，由有机金属化合物和/或氢化物组成的材料热解 用作掺杂剂以生长具有高电阻的至少含有铝的III-V族化合物半导体晶体层。 所述方法可以通过使用能够独立控制氧浓度和铝浓度并且具有小的氧剩余效果的掺杂剂来生长高电阻的化合物半导体层。

公开(公告)号：US5064778A

公开(公告)日：1991-11-12

申请号：US472153

申请日：1990-01-30

申请人： Takayoshi Maeda ,  Masahiko Hata ,  Noboru Fukuhara ,  Tadeshi Watanabe

发明人： Takayoshi Maeda ,  Masahiko Hata ,  Noboru Fukuhara ,  Tadeshi Watanabe

IPC分类号： C30B25/02 ,  H01L21/205 ,  H01L21/20

CPC分类号： C30B25/02 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02546 ,  H01L21/02576 ,  H01L21/0262 ,  Y10S148/065 ,  Y10S148/11

摘要： A vapor-phase epitaxial growth method for producing a Groups III-V compound semiconductor containing arsenic by vapor-phase epitaxial growth using arsenic trihydride as an arsenic source is disclosed, wherein said arsenic trihydride has a volatile impurity concentration of not more than 1.5 molppb on a germanium tetrahydride conversion. The resulting epitaxial crystal has a low residual carrier concentration and is applicable to a field effect transistor.

公开(公告)号：US08890213B2

公开(公告)日：2014-11-18

申请号：US13301272

申请日：2011-11-21

申请人： Sadanori Yamanaka ,  Masahiko Hata ,  Noboru Fukuhara

发明人： Sadanori Yamanaka ,  Masahiko Hata ,  Noboru Fukuhara

IPC分类号： H01L29/70 ,  H01L29/66 ,  H01L31/0304 ,  H01L29/737 ,  H01L21/02 ,  H01L31/0312 ,  H01L31/18

CPC分类号： H01L29/7371 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02521 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/66318 ,  H01L31/0304 ,  H01L31/03044 ,  H01L31/0312 ,  H01L31/1852 ,  Y02E10/544 ,  Y02P70/521

摘要： There is provided a semiconductor wafer including a base wafer that has an impurity region in which an impurity atom has been introduced into silicon, a plurality of seed bodies provided in contact with the impurity region, and a plurality of compound semiconductors each provided in contact with the corresponding seed bodies and lattice-matched or pseudo-lattice-matched to the corresponding seed bodies. The semiconductor wafer can further include an inhibitor provided on the base wafer and in which a plurality of apertures exposing at least a part of the impurity region are provided.

摘要翻译： 提供了一种半导体晶片，其包括：基底晶片，其具有将杂质原子引入到硅中的杂质区域，与杂质区域接触的多个晶种;以及多个化合物半导体，各自与 相应的种子体和与对应的种子晶格匹配或伪晶格匹配。 半导体晶片还可以包括设置在基底晶片上的抑制剂，其中设置暴露至少一部分杂质区域的多个孔。

公开(公告)号：US20110233689A1

公开(公告)日：2011-09-29

申请号：US13133092

申请日：2009-11-27

申请人： Masahiko Hata ,  Noboru Fukuhara ,  Hisashi Yamada ,  Shinichi Takagi ,  Masakazu Sugiyama ,  Mitsuru Takenaka ,  Tetsuji Yasuda ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii ,  Akihiro Ohtake ,  Jun Nara

发明人： Masahiko Hata ,  Noboru Fukuhara ,  Hisashi Yamada ,  Shinichi Takagi ,  Masakazu Sugiyama ,  Mitsuru Takenaka ,  Tetsuji Yasuda ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii ,  Akihiro Ohtake ,  Jun Nara

IPC分类号： H01L29/78 ,  H01L29/04 ,  H01L21/336 ,  H01L29/20 ,  H01L21/20

CPC分类号： H01L29/045 ,  H01L29/20 ,  H01L29/7833 ,  H01L29/78681

摘要： There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.

摘要翻译： 提供了一种半导体器件，其包括具有锌闪光体型晶体结构的III-V族化合物半导体，与III-V族化合物半导体的（111）面接触的绝缘材料， 相当于（111）面的III-V族化合物半导体，或相对于（111）面或与（111）面相当的面的偏角的平面，和与MIS接触的MIS型电极 具有绝缘材料并且包括金属导电材料。

公开(公告)号：US20120032699A1

公开(公告)日：2012-02-09

申请号：US13273781

申请日：2011-10-14

申请人： Noboru FUKUHARA ,  Masahiko Hata

发明人： Noboru FUKUHARA ,  Masahiko Hata

IPC分类号： G01R31/26

CPC分类号： G01R31/025 ,  G01R31/129

摘要： There is provided a method of measuring a leakage current or a dielectric breakdown voltage of a semiconductor wafer that has a base wafer and a buffer layer formed on the base wafer. The method includes providing, on the buffer layer, a plurality of electrodes including a hole injection electrode made of a material that injects a hole into the buffer layer when an electric field is applied thereto, measuring an electric current flowing through a pair of electrodes or a voltage between the electrodes when a voltage or an electric current is applied to the pair of electrodes, the electrodes including at least one hole injection electrode, and measuring a leakage current or a dielectric breakdown voltage caused by hole migration in the semiconductor wafer based on the current flowing through the pair of electrodes or the voltage generated between the pair of the electrodes.

摘要翻译： 提供了一种测量半导体晶片的漏电流或介电击穿电压的方法，该半导体晶片具有形成在基底晶片上的基底晶片和缓冲层。 该方法包括在缓冲层上设置多个电极，该多个电极包括由施加电场的空穴注入到缓冲层中的材料制成的空穴注入电极，测量流过一对电极的电流或 当对一对电极施加电压或电流时，电极之间的电压，所述电极包括至少一个空穴注入电极，并且测量基于半导体晶片中的空穴迁移引起的漏电流或介电击穿电压，基于 流过该对电极的电流或在一对电极之间产生的电压。

公开(公告)号：US5441913A

公开(公告)日：1995-08-15

申请号：US266680

申请日：1994-06-28

申请人： Masahiko Hata ,  Noboru Fukuhara ,  Hiroaki Takata ,  Katsumi Inui

发明人： Masahiko Hata ,  Noboru Fukuhara ,  Hiroaki Takata ,  Katsumi Inui

IPC分类号： H01L21/203 ,  H01L21/205 ,  H01L21/20

CPC分类号： H01L21/02395 ,  H01L21/02433 ,  H01L21/02463 ,  H01L21/02546 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02631

摘要： A semiconductor epitaxial substrate and a process for producing the same, the semiconductor epitaxial substrate comprising a GaAs single-crystal substrate having thereon an In.sub.y Ga.sub.(1-y) As (0

摘要翻译： 一种半导体外延基板及其制造方法，所述半导体外延基板包括其上具有In y Ga（1-y）As（0

公开(公告)号：US4976216A

公开(公告)日：1990-12-11

申请号：US269348

申请日：1988-11-10

申请人： Takayoshi Maeda ,  Masahiko Hata ,  Yasunari Zempo ,  Noboru Fukuhara ,  Hiroaki Takata

发明人： Takayoshi Maeda ,  Masahiko Hata ,  Yasunari Zempo ,  Noboru Fukuhara ,  Hiroaki Takata

IPC分类号： H01L21/205 ,  C23C16/458 ,  C30B25/02 ,  C30B25/08 ,  C30B25/12 ,  C30B25/14

CPC分类号： C30B25/14 ,  C23C16/4588 ,  C30B25/02 ,  C30B25/08 ,  C30B25/12 ,  C30B29/42

摘要： In an apparatus for vapor-phase growth which comprises a reactor having an inlet for the introduction of the gas containing a source material on its top and a susceptor provided in the downstream portion of the reactor, the improvement wherein the susceptor is generally in a conical or polygonal pyramid form consisting of an upper rectifying portion and a lower substrate holding portion, with the diameter of the susceptor in its lower portion increasing by a greater degree than in its upper portion.

摘要翻译： 在用于气相生长的装置中，其包括具有用于引入其顶部具有源材料的气体的入口和设置在反应器的下游部分中的基座的反应器，其中基座大体上为圆锥形 或由上部整流部分和下部基板保持部分组成的多边形棱锥形状，其下部中的基座的直径比其上部增加更大的程度。

公开(公告)号：US08610450B2

公开(公告)日：2013-12-17

申请号：US13273781

申请日：2011-10-14

申请人： Noboru Fukuhara ,  Masahiko Hata

发明人： Noboru Fukuhara ,  Masahiko Hata

IPC分类号： G01R31/26

CPC分类号： G01R31/025 ,  G01R31/129

摘要： There is provided a method of measuring a leakage current or a dielectric breakdown voltage of a semiconductor wafer that has a base wafer and a buffer layer formed on the base wafer. The method includes providing, on the buffer layer, a plurality of electrodes including a hole injection electrode made of a material that injects a hole into the buffer layer when an electric field is applied thereto, measuring an electric current flowing through a pair of electrodes or a voltage between the electrodes when a voltage or an electric current is applied to the pair of electrodes, the electrodes including at least one hole injection electrode, and measuring a leakage current or a dielectric breakdown voltage caused by hole migration in the semiconductor wafer based on the current flowing through the pair of electrodes or the voltage generated between the pair of the electrodes.

摘要翻译： 提供了一种测量半导体晶片的漏电流或介电击穿电压的方法，该半导体晶片具有形成在基底晶片上的基底晶片和缓冲层。 该方法包括在缓冲层上设置多个电极，该多个电极包括由施加电场的空穴注入到缓冲层中的材料制成的空穴注入电极，测量流过一对电极的电流或 当对一对电极施加电压或电流时，电极之间的电压，所述电极包括至少一个空穴注入电极，并且测量基于半导体晶片中的空穴迁移引起的漏电流或介电击穿电压，基于 流过该对电极的电流或在一对电极之间产生的电压。

公开(公告)号：US5332451A

公开(公告)日：1994-07-26

申请号：US875410

申请日：1992-04-29

申请人： Masahiko Hata ,  Noboru Fukuhara ,  Takayoshi Maeda

发明人： Masahiko Hata ,  Noboru Fukuhara ,  Takayoshi Maeda

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/338 ,  H01L29/205 ,  H01L29/778 ,  H01L29/812 ,  H01L29/36

CPC分类号： H01L29/8128 ,  H01L21/02395 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02581 ,  H01L29/205

摘要： An epitaxially grown compound-semiconductor crystal comprising a substrate, a buffer layer formed directly or indirectly on the substrate, and an active layer formed on the buffer layer. The buffer layer comprises (A) a high-resistivity AlGaAs or AlGaInP layer doped with oxygen or/and a transition metal and, formed thereon, (B) a layer consisting of high-purity GaAs, InGaP, or AlGaAs.

摘要翻译： 一种外延生长的化合物半导体晶体，其包含基板，在基板上直接或间接形成的缓冲层以及形成在缓冲层上的活性层。 缓冲层包括（A）掺杂有氧或/和过渡金属的高电阻率AlGaAs或AlGaInP层，并在其上形成（B）由高纯度GaAs，InGaP或AlGaAs组成的层。

公开(公告)号：US08779471B2

公开(公告)日：2014-07-15

申请号：US13413216

申请日：2012-03-06

申请人： Masahiko Hata ,  Hisashi Yamada ,  Noboru Fukuhara ,  Shinichi Takagi ,  Mitsuru Takenaka ,  Masafumi Yokoyama ,  Tetsuji Yasuda ,  Yuji Urabe ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii

发明人： Masahiko Hata ,  Hisashi Yamada ,  Noboru Fukuhara ,  Shinichi Takagi ,  Mitsuru Takenaka ,  Masafumi Yokoyama ,  Tetsuji Yasuda ,  Yuji Urabe ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii

IPC分类号： H01L29/66

CPC分类号： H01L29/7786 ,  H01L21/26553 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66318 ,  H01L29/66522

摘要： Provided is a field-effect transistor including a gate insulating layer, a first semiconductor crystal layer in contact with the gate insulating layer, and a second semiconductor crystal layer lattice-matching or pseudo lattice-matching the first semiconductor crystal layer. Here, the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer are arranged in the order of the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer, the first semiconductor crystal layer is made of Inx1Ga1-x1Asy1P1-y1 (0

摘要翻译： 提供了一种场效应晶体管，其包括栅极绝缘层，与栅极绝缘层接触的第一半导体晶体层和第二半导体晶体层与第一半导体晶体层的晶格匹配或伪晶格匹配。 这里，栅绝缘层，第一半导体晶体层和第二半导体晶体层按栅极绝缘层，第一半导体晶体层和第二半导体晶体层的顺序排列，第一半导体晶体层被制成 的In x Ga 1-x As y 1 P 1-y 1（0