公开(公告)号：US11980083B2

公开(公告)日：2024-05-07

申请号：US16832583

申请日：2020-03-27

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Keum Hee Lee ,  Joongeol Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Seung-Ha Choi ,  Jiyun Hong

IPC分类号： H01L51/56 ,  H10K71/00 ,  H10K71/20 ,  H10K71/60 ,  H10K102/10

CPC分类号： H10K71/00 ,  H10K71/233 ,  H10K71/60 ,  H10K2102/103

摘要： A method of manufacturing a thin film transistor includes: forming an active pattern on a substrate; forming an insulating layer and a gate electrode layer on the active pattern in order; forming a photoresist pattern on the gate electrode layer; forming a preliminary gate electrode by wet etching the gate electrode layer using the photoresist pattern; forming an insulating pattern by dry etching the insulating layer using the photoresist pattern and the preliminary gate electrode; and forming a gate electrode by wet etching a side surface of the preliminary gate electrode using the photoresist pattern.

公开(公告)号：US09111805B2

公开(公告)日：2015-08-18

申请号：US14230787

申请日：2014-03-31

申请人： Samsung Display Co., Ltd.

发明人： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

摘要翻译： 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US09825066B2

公开(公告)日：2017-11-21

申请号：US14990383

申请日：2016-01-07

申请人： SAMSUNG DISPLAY CO., LTD

发明人： Myung-Kwan Ryu ,  Eok-Su Kim ,  Kyoung Seok Son ,  Seung-Ha Choi ,  Sho-Yeon Kim ,  Hyun Kim ,  Eun-Hye Park ,  Byung-Hwan Chu

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L29/417

CPC分类号： H01L27/1248 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/78696

摘要： A thin film transistor substrate includes a gate electrode, a channel layer overlapping the gate electrode, a source electrode overlapping the channel layer, a drain electrode overlapping the channel layer and the source electrode, and a spacer disposed between the source electrode and the drain electrode.

公开(公告)号：US20160211281A1

公开(公告)日：2016-07-21

申请号：US14990383

申请日：2016-01-07

申请人： SAMSUNG DISPLAY CO., LTD

发明人： Myung-Kwan Ryu ,  Eok-Su Kim ,  Kyoung Seok Son ,  Seung-Ha Choi ,  Sho-Yeon Kim ,  Hyun Kim ,  Eun-Hye Park ,  Byung-Hwan Chu

IPC分类号： H01L27/12

CPC分类号： H01L27/1248 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/78696

摘要： A thin film transistor substrate includes a gate electrode, a channel layer overlapping the gate electrode, a source electrode overlapping the channel layer, a drain electrode overlapping the channel layer and the source electrode, and a spacer disposed between the source electrode and the drain electrode.

摘要翻译： 薄膜晶体管基板包括栅电极，与栅电极重叠的沟道层，与沟道层重叠的源极，与沟道层重叠的漏电极和源极，以及设置在源电极和漏极之间的间隔物 。

公开(公告)号：US09287297B2

公开(公告)日：2016-03-15

申请号：US14486620

申请日：2014-09-15

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Sho Yeon Kim ,  Hyun Kim ,  Eun Hye Park ,  Byung Hwan Chu ,  Seung-Ha Choi

IPC分类号： H01L31/036 ,  H01L27/12

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/7869

摘要： A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 μm.

摘要翻译： 薄膜晶体管阵列面板包括：栅极线，其设置在基板上，并且包括栅极驱动器区域的第一连接构件和显示区域的栅极电极，栅极绝缘层，设置在所述基板上，并且具有暴露于所述第一接触孔 所述第一连接构件，设置在所述栅极绝缘层的区域上的半导体层，设置在所述栅极绝缘层和所述半导体层上的数据线，并且包括漏电极，源电极和连接到所述第一连接构件的第二连接构件 连接构件，通过第一接触孔，设置在数据线上的钝化层，源电极，漏电极和第二连接构件，以及设置在钝化层上并电连接到漏电极的像素电极。 第一接触孔的水平宽度为1〜2μm。

公开(公告)号：US20150318312A1

公开(公告)日：2015-11-05

申请号：US14799060

申请日：2015-07-14

申请人： Samsung Display Co.,Ltd

发明人： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US09520412B2

公开(公告)日：2016-12-13

申请号：US14798123

申请日：2015-07-13

申请人： Samsung Display Co., Ltd.

发明人： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L27/12 ,  H01L21/4757 ,  H01L21/441 ,  H01L21/475 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US09455278B2

公开(公告)日：2016-09-27

申请号：US15053807

申请日：2016-02-25

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Sho Yeon Kim ,  Hyun Kim ,  Eun Hye Park ,  Byung Hwan Chu ,  Seung-Ha Choi

IPC分类号： H01L31/036 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/7869

摘要： A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 μm.

公开(公告)号：US09418861B2

公开(公告)日：2016-08-16

申请号：US14455771

申请日：2014-08-08

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Seung-Ha Choi ,  Kyoung-Jae Chung ,  Woo-Geun Lee

IPC分类号： H01L21/308 ,  H01L27/12 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1362

CPC分类号： H01L21/3086 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

摘要： Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.

摘要翻译： 提供了显示基板，显示装置和制造显示基板的方法。 显示基板包括：限定像素区域的基板; 在基板上形成栅电极和栅极焊盘; 形成在栅极电极和栅极焊盘上的栅极绝缘层; 缓冲层图案与栅电极重叠并形成在栅极绝缘层上; 形成在缓冲层图案上的绝缘膜图案; 形成在所述绝缘膜图案上的氧化物半导体图案; 形成在所述氧化物半导体图案上的源电极; 以及形成在氧化物半导体图案上并与源电极分离的漏电极。

公开(公告)号：US08975145B2

公开(公告)日：2015-03-10

申请号：US14168971

申请日：2014-01-30

申请人： Samsung Display Co., Ltd.

发明人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC分类号： H01L33/44 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。