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    ELECTRONIC COMPONENT PACKAGE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    ELECTRONIC COMPONENT PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    电子元件封装及其制造方法

    公开(公告)号：US20140145322A1

    公开(公告)日：2014-05-29

    申请号：US14069906

    申请日：2013-11-01

    申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

    发明人： Young Nam HWANG ,  Suk Jin HAM ,  Seung Wan WOO ,  Po Chul KIM ,  Kyung Ho LEE

    IPC分类号： H01L23/08 ,  H01L21/56

    CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L23/562 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511

    摘要： Disclosed herein are an electronic component package and a method of manufacturing the same. The electronic component package includes: a substrate; a connection member provided on at least one surface of the substrate; an active element coupled to the substrate by the connection member; and a molding part covering an exposed surface of the active element, wherein the molding part is formed of a first material having a coefficient of thermal expansion of 8 to 15 ppm/° C. and thermal conductivity of 1 to 5 W/m° C. Therefore, warpage may be significantly decreased and heat radiation performance of the active element may be improved, as compared with the case of implementing the molding part using an EMC according to the related art.

    摘要翻译： 本文公开了一种电子部件封装及其制造方法。 电子部件封装包括：基板; 设置在所述基板的至少一个表面上的连接构件; 通过所述连接部件与所述基板连接的有源元件; 以及覆盖有源元件的暴露表面的成型部件，其中，所述模制部件由热膨胀系数为8〜15ppm /℃，导热率为1〜5W / m℃的第一材料形成 因此，与使用根据现有技术的EMC的成型部件的情况相比，可能显着降低翘曲并且可以提高有源元件的散热性能。

    SYSTEM OF MEASURING WARPAGE AND METHOD OF MEASURING WARPAGE
    3.
    发明申请
    SYSTEM OF MEASURING WARPAGE AND METHOD OF MEASURING WARPAGE 审中-公开
    测量温度系统和测量温度的方法

    公开(公告)号：US20140184782A1

    公开(公告)日：2014-07-03

    申请号：US14142714

    申请日：2013-12-27

    申请人： Samsung Electro-Mechanics Co., Ltd.

    发明人： Seung Wan WOO ,  Po Chul KIM ,  Young Nam HWANG ,  Kyung Ho LEE ,  Suk Jin HAM

    IPC分类号： H01L21/66 ,  H05K1/02

    CPC分类号： H01L22/12 ,  G01B11/167 ,  G01B11/254 ,  G01B11/306 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein are a system for measuring a warpage and a method for measuring a warpage. The system for measuring a warpage includes: a heating plate portion heating the sample; and a reference gating portion disposed between the sample and the camera so as to be spaced apart from the sample by a predetermined distance, wherein the reference grating portion includes a plurality of wires that are each spaced apart from each other by a predetermined interval, thereby accurately measuring the warpage without being affected by the fume generated from the sample.

    摘要翻译： 本文公开了一种用于测量翘曲的系统和用于测量翘曲的方法。 用于测量翘曲的系统包括：加热试样的加热板部分; 以及设置在样本和照相机之间以便与样本间隔开预定距离的参考门控部分，其中参考光栅部分包括彼此间隔开预定间隔的多条电线，从而 准确地测量翘曲而不受样品产生的烟雾影响。

    LAMINATION LAYER TYPE SEMICONDUCTOR PACKAGE
    4.
    发明申请
    LAMINATION LAYER TYPE SEMICONDUCTOR PACKAGE 审中-公开
    层压层型半导体封装

    公开(公告)号：US20140145323A1

    公开(公告)日：2014-05-29

    申请号：US14089724

    申请日：2013-11-25

    申请人： Samsung Electro-Mechanics Co., Ltd.

    发明人： Kyung Ho LEE ,  Hyun Bok KWON ,  Seung Wan WOO ,  Young Nam HWANG ,  Suk Jin HAM ,  Po Chul KIM ,  So Hyang EUN ,  Se Jun PARK

    IPC分类号： H01L23/373

    CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/3737 ,  H01L23/49833 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15331

    摘要： Disclosed herein is a lamination layer type semiconductor package, and more particularly, a lamination layer type semiconductor package capable of maintaining a thickness of a package on package structure at a minimum and minimizing a warpage defect by mounting two chips so as to correspond to each other. The lamination layer type semiconductor package includes: an upper package having an upper flip chip mounted on an upper substrate; a lower package having a lower flip chip mounted on a lower substrate and disposed so as to closely adhere the upper flip chip and the lower flip chip to each other; a heat dissipation adhesive member adhesively fixing the upper flip chip and the lower flip chip and dissipating heat generated from the upper flip chip and the lower flip chip; and a molding member molding between the upper substrate and the lower substrate.

    摘要翻译： 本文公开了一种叠层型半导体封装，更具体地说，是一种能够将封装结构上的封装的厚度最小化并且通过安装两个芯片以使彼此对应来最小化翘曲缺陷的层压层型半导体封装 。 叠层型半导体封装包括：上封装，其具有安装在上基板上的上倒装芯片; 下封装，其具有安装在下基板上的下倒装芯片，并且被设置为将上倒装芯片和下倒装芯片彼此紧贴; 散热粘合构件，其粘合地固定所述上倒装芯片和所述下倒装芯片，并消散由所述上倒装芯片和所述下倒装芯片产生的热量; 以及在上基板和下基板之间成型的成型部件。

    SYSTEM OF MEASURING WARPAGE AND METHOD OF MEASURING WARPAGE
    5.
    发明申请
    SYSTEM OF MEASURING WARPAGE AND METHOD OF MEASURING WARPAGE 有权
    测量温度系统和测量温度的方法

    公开(公告)号：US20140104417A1

    公开(公告)日：2014-04-17

    申请号：US14048703

    申请日：2013-10-08

    申请人： Samsung Electro-Mechanics Co., Ltd.

    发明人： Seung Wan WOO ,  Young Nam HWANG ,  Po Chul KIM ,  Kyung Ho LEE ,  Suk Jin HAM

    IPC分类号： G01N21/88

    CPC分类号： G01N21/88 ,  G01B11/306 ,  G01N25/16

    摘要： Disclosed herein are a system of measuring a warpage and a method of measuring a warpage. The system of measuring a warpage of a sample by analyzing an image photographed by the camera using light that is diffused from a light source and reflected on a surface of a sample and is arrived at the camera through a reference grating part, the system includes: an intake part that removes a fume generated from the sample. By this configuration, it is possible to measure the warpage while effectively removing the fume generated from the sample according to the increase in the temperature of the sample at the time of measuring the warpage, thereby improving the accuracy of the warpage measurement.

    摘要翻译： 这里公开了测量翘曲的系统和测量翘曲的方法。 通过使用从光源扩散并在样品表面上反射的光通过分析由相机拍摄的图像并通过参考光栅部件到达相机的方式来测量样品的翘曲的系统，该系统包括： 一个摄取部分去除样品产生的烟雾。 通过该结构，可以根据测定翘曲时的试样的温度的上升而有效地除去样品产生的烟雾，能够测量翘曲，提高翘曲测定精度。