Semiconductor package having a high reliability

    公开(公告)号:US11018115B2

    公开(公告)日:2021-05-25

    申请号:US16824403

    申请日:2020-03-19

    摘要: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.

    Semiconductor package
    3.
    发明授权

    公开(公告)号:US11462479B2

    公开(公告)日:2022-10-04

    申请号:US16548813

    申请日:2019-08-22

    IPC分类号: H01L25/065 H01L23/538

    摘要: A semiconductor package is provided including a package substrate, a first semiconductor chip on the substrate, with a first surface and a second surface opposite to each other; a plurality of first connection terminals disposed on the first surface contacting an upper surface of the substrate; a second semiconductor chip disposed on the second surface, with a third surface and a fourth surface opposite to each other; a plurality of second connection terminals disposed on the third surface contacting the second surface, wherein an absolute value between a first area, the sum of areas in which the plurality of first connection terminals contact the upper surface of the package substrate, and a second area, the sum of areas in which the plurality of second connection terminals contact the second surface of the first semiconductor chip, is equal to or less than about 0.3 of the first area.

    Semiconductor package
    5.
    发明授权

    公开(公告)号:US11848274B2

    公开(公告)日:2023-12-19

    申请号:US17811362

    申请日:2022-07-08

    发明人: Geol Nam Gunho Chang

    摘要: A semiconductor package includes: a base chip; a first semiconductor chip disposed on the base chip; a second semiconductor chip disposed on the first semiconductor chip; a first insulating layer disposed between the base chip and the first semiconductor chip; a second insulating layer disposed between the first semiconductor chip and the second semiconductor chip; a first connection bump penetrating through the first insulating layer and connecting the base chip and the first semiconductor chip to each other; and a second connection bump penetrating through the second insulating layer and connecting the first semiconductor chip and the second semiconductor chip to each other. The base chip has a width greater than a width of each of the first and second semiconductor chips. The first insulating layer and the second insulating layer include different materials from each other.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请

    公开(公告)号:US20220344271A1

    公开(公告)日:2022-10-27

    申请号:US17811362

    申请日:2022-07-08

    发明人: Geol Nam Gunho Chang

    摘要: A semiconductor package includes: a base chip; a first semiconductor chip disposed on the base chip; a second semiconductor chip disposed on the first semiconductor chip; a first insulating layer disposed between the base chip and the first semiconductor chip; a second insulating layer disposed between the first semiconductor chip and the second semiconductor chip; a first connection bump penetrating through the first insulating layer and connecting the base chip and the first semiconductor chip to each other; and a second connection bump penetrating through the second insulating layer and connecting the first semiconductor chip and the second semiconductor chip to each other. The base chip has a width greater than a width of each of the first and second semiconductor chips. The first insulating layer and the second insulating layer include different materials from each other.

    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20190229091A1

    公开(公告)日:2019-07-25

    申请号:US16225074

    申请日:2018-12-19

    摘要: Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip.

    Semiconductor package having a high reliability

    公开(公告)号:US10153255B2

    公开(公告)日:2018-12-11

    申请号:US15439321

    申请日:2017-02-22

    摘要: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.