SEMICONDUCTOR PACKAGE
    1.
    发明申请

    公开(公告)号:US20220037261A1

    公开(公告)日:2022-02-03

    申请号:US17349174

    申请日:2021-06-16

    摘要: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.

    SEMICONDUCTOR PACKAGE DEVICE
    2.
    发明申请

    公开(公告)号:US20220020714A1

    公开(公告)日:2022-01-20

    申请号:US17204313

    申请日:2021-03-17

    摘要: A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请

    公开(公告)号:US20220077040A1

    公开(公告)日:2022-03-10

    申请号:US17318227

    申请日:2021-05-12

    IPC分类号: H01L23/498 H01L23/00

    摘要: A semiconductor package may include a redistribution substrate having a first surface and a second surface, opposite to each other, a semiconductor chip on the first surface of the redistribution substrate, and a solder pattern on the second surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern coupled to the solder pattern, a first redistribution pattern on the under-bump pattern, the first redistribution pattern including a first via portion and a first wire portion, and a first seed pattern between the under-bump pattern and the first redistribution pattern and on a side surface of the first via portion and a bottom surface of the first wire portion. A bottom surface of the first seed pattern may be at a level lower than a top surface of the under-bump pattern.

    SEMICONDUCTOR PACKAGE
    7.
    发明申请

    公开(公告)号:US20220399316A1

    公开(公告)日:2022-12-15

    申请号:US17677453

    申请日:2022-02-22

    摘要: Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.