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公开(公告)号:US20220037261A1
公开(公告)日:2022-02-03
申请号:US17349174
申请日:2021-06-16
发明人: Ju-Il CHOI , Gyuho KANG , Un-Byoung KANG , Byeongchan KIM , Junyoung PARK , Jongho LEE , Hyunsu HWANG
IPC分类号: H01L23/538 , H01L23/498 , H01L23/00 , H01L23/31 , H01L25/10
摘要: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.
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公开(公告)号:US20220020714A1
公开(公告)日:2022-01-20
申请号:US17204313
申请日:2021-03-17
发明人: Ju-Il CHOI , Gyuho KANG , Heewon KIM , Junyoung PARK , Seong-Hoon BAE , Jin Ho AN
IPC分类号: H01L23/00 , H01L23/532 , H01L23/538
摘要: A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.
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公开(公告)号:US20220077040A1
公开(公告)日:2022-03-10
申请号:US17318227
申请日:2021-05-12
发明人: Jeonggi JIN , Gyuho KANG , Solji SONG , Un-Byoung KANG , Ju-Il CHOI
IPC分类号: H01L23/498 , H01L23/00
摘要: A semiconductor package may include a redistribution substrate having a first surface and a second surface, opposite to each other, a semiconductor chip on the first surface of the redistribution substrate, and a solder pattern on the second surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern coupled to the solder pattern, a first redistribution pattern on the under-bump pattern, the first redistribution pattern including a first via portion and a first wire portion, and a first seed pattern between the under-bump pattern and the first redistribution pattern and on a side surface of the first via portion and a bottom surface of the first wire portion. A bottom surface of the first seed pattern may be at a level lower than a top surface of the under-bump pattern.
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公开(公告)号:US20210384137A1
公开(公告)日:2021-12-09
申请号:US17147661
申请日:2021-01-13
发明人: Ju-IL CHOI , Gyuho KANG , Seong-Hoon BAE , Dongjoon OH , Chungsun LEE , Hyunsu HWANG
IPC分类号: H01L23/532 , H01L23/00 , H01L23/522 , H01L23/48
摘要: A semiconductor device includes a first semiconductor chip that includes a first conductive pad whose top surface is exposed; and a second semiconductor chip that includes a second conductive pad whose top surface is exposed and in contact with at least a portion of the top surface of the first conductive pad. The first semiconductor chip may include a first diffusion barrier in contact with a bottom surface of the first conductive pad, and a second diffusion barrier in contact with a lateral surface of the first conductive pad, and the first diffusion barrier and the second diffusion barrier may include different materials from each other.
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公开(公告)号:US20240071899A1
公开(公告)日:2024-02-29
申请号:US18450836
申请日:2023-08-16
发明人: Gyuho KANG , Hyungjun PARK , Seonghoon BAE , Sanghyuck OH , Kwangok JEONG , Juil CHOI
IPC分类号: H01L23/498 , H01L21/48 , H01L23/538 , H01L25/10
CPC分类号: H01L23/49866 , H01L21/4857 , H01L23/49822 , H01L23/5383 , H01L25/105 , H01L24/16
摘要: Provided is a semiconductor package. The semiconductor package including a redistribution structure including a plurality of redistribution conductive patterns, a plurality of conductive vias connected to at least one of the plurality of redistribution conductive patterns, a plurality of lower pads connected to the plurality of conductive vias, and a plurality of redistribution insulation layers and the plurality of redistribution conductive patterns alternating each other, a semiconductor chip arranged on the redistribution structure, and an external connection terminal attached to the plurality of lower surface pads of the redistribution structure, wherein each of the plurality of redistribution conductive patterns includes a metal layer including copper and a skin layer arranged on an upper surface of the metal layer and including copper and nickel, may be provided.
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公开(公告)号:US20230282582A1
公开(公告)日:2023-09-07
申请号:US18196077
申请日:2023-05-11
发明人: Ju-Il CHOI , Gyuho KANG , Seong-Hoon BAE , Dongjoon OH , Chungsun LEE , Hyunsu HWANG
IPC分类号: H01L23/532 , H01L23/48 , H01L23/00 , H01L23/522
CPC分类号: H01L23/53238 , H01L23/481 , H01L23/5226 , H01L23/5329 , H01L24/05 , H01L24/08 , H01L24/16 , H01L2224/05647 , H01L2224/08145 , H01L2224/16227
摘要: A semiconductor device includes a first semiconductor chip that includes a first conductive pad whose top surface is exposed; and a second semiconductor chip that includes a second conductive pad whose top surface is exposed and in contact with at least a portion of the top surface of the first conductive pad. The first semiconductor chip may include a first diffusion barrier in contact with a bottom surface of the first conductive pad, and a second diffusion barrier in contact with a lateral surface of the first conductive pad, and the first diffusion barrier and the second diffusion barrier may include different materials from each other.
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公开(公告)号:US20220399316A1
公开(公告)日:2022-12-15
申请号:US17677453
申请日:2022-02-22
发明人: Ju-Il CHOI , Gyuho KANG , Heewon KIM , Sechul PARK , Jongho PARK , Junyoung PARK
IPC分类号: H01L25/10 , H01L23/498 , H01L23/538 , H01L23/00 , H01L23/48
摘要: Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.
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