公开(公告)号：US20140077388A1

公开(公告)日：2014-03-20

申请号：US13750289

申请日：2013-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hong-Pyo HEO ,  Young-soo KWON ,  Jai-kwang SHIN ,  Young-tek OH ,  Hyung-su JEONG

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L23/49827 ,  H01L21/50 ,  H01L23/3677 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/0603 ,  H01L2224/06519 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32227 ,  H01L2224/32235 ,  H01L2224/3303 ,  H01L2224/33519 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device includes a device chip coupled to an electrode chip. The device chip includes a first device electrode on a first substrate, and the electrode chip includes a first pad electrode extending at least partially through a second substrate. The first pad electrode is electrically connected to the first device electrode and includes spaced conductive sections which serve as a heat dissipating structure to transfer heat received from the device chip and the electrode chip. A method for making a semiconductor device includes using the substrate of the electrode chip as a support during thinning the substrate of the device chip.

Abstract translation: 半导体器件包括耦合到电极芯片的器件芯片。 器件芯片包括在第一衬底上的第一器件电极，并且电极芯片包括至少部分延伸穿过第二衬底的第一焊盘电极。 第一焊盘电极电连接到第一器件电极并且包括间隔的导电部分，其用作散热结构以传递从器件芯片和电极芯片接收的热量。 制造半导体器件的方法包括在薄化器件芯片的衬底期间使用电极芯片的衬底作为支撑体。

公开(公告)号：US20140077267A1

公开(公告)日：2014-03-20

申请号：US13833979

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hong-Pyo HEO

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/1029 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66431 ,  H01L29/66522 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7834

Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a first semiconductor layer on a substrate and a second semiconductor layer on the first semiconductor layer. The first and second semiconductor layers define a recessed region. A semiconductor doped layer is in the recessed region of first and second semiconductor layers. A 2-dimensional electron gas (2DEG) region is at a portion of the first semiconductor layer adjacent to both sides of the semiconductor doped layer.

Abstract translation: 根据示例性实施例，高电子迁移率晶体管（HEMT）包括衬底上的第一半导体层和第一半导体层上的第二半导体层。 第一和第二半导体层限定凹陷区域。 半导体掺杂层位于第一和第二半导体层的凹陷区域中。 二维电子气体（2DEG）区域位于与半导体掺杂层的两侧相邻的第一半导体层的部分。

公开(公告)号：US20150054035A1

公开(公告)日：2015-02-26

申请号：US14532699

申请日：2014-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hong-Pyo HEO

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/1029 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66431 ,  H01L29/66522 ,  H01L29/7787 ,  H01L29/78 ,  H01L29/7833 ,  H01L29/7834

Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a first semiconductor layer on a substrate and a second semiconductor layer on the first semiconductor layer. The first and second semiconductor layers define a recessed region. A semiconductor doped layer is in the recessed region of first and second semiconductor layers. A 2-dimensional electron gas (2DEG) region is at a portion of the first semiconductor layer adjacent to both sides of the semiconductor doped layer.

Abstract translation: 根据示例性实施例，高电子迁移率晶体管（HEMT）包括衬底上的第一半导体层和第一半导体层上的第二半导体层。 第一和第二半导体层限定凹陷区域。 半导体掺杂层位于第一和第二半导体层的凹陷区域中。 二维电子气体（2DEG）区域位于与半导体掺杂层的两侧相邻的第一半导体层的部分。

公开(公告)号：US20140147973A1

公开(公告)日：2014-05-29

申请号：US13938580

申请日：2013-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyuk-soon CHOI ,  Hong-Pyo HEO ,  Jong-seob KIM ,  Jai-kwang SHIN ,  Jae-joon OH ,  In-jun HWANG

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L24/02 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/73 ,  H01L24/94 ,  H01L29/4175 ,  H01L29/7786 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05567 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16235 ,  H01L2224/73251 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2224/023 ,  H01L2224/13

Abstract: A method of packaging power devices at a wafer level is disclosed. The method includes preparing a wafer having a plurality of nitride power devices thereon, each of the plurality of nitride power devices having a plurality of electrodes thereon; forming a polymer layer on the plurality of nitride power devices; exposing each of the electrodes from the polymer layer; forming a solder bump on the exposed electrodes; forming a molding layer covering the solder bump on the polymer layer; and removing the wafer and exposing the solder bump.

Abstract translation: 公开了一种在晶片级封装功率器件的方法。 该方法包括制备其上具有多个氮化物功率器件的晶片，所述多个氮化物功率器件中的每一个在其上具有多个电极; 在所述多个氮化物功率器件上形成聚合物层; 使聚合物层中的每一个电极露出; 在暴露的电极上形成焊料凸块; 形成覆盖聚合物层上的焊料凸点的成型层; 并移除晶片并暴露焊料凸块。