公开(公告)号：US09483413B2

公开(公告)日：2016-11-01

申请号：US14523159

申请日：2014-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Avner Dor ,  Elona Erez ,  Shay Landis ,  Jun Jin Kong

IPC: G06F12/10

CPC classification number: G06F12/1009 ,  G06F12/0246 ,  G06F2212/152 ,  G06F2212/2022 ,  G06F2212/7201 ,  G06F2212/7203

Abstract: At least one example embodiment discloses a method of controlling a nonvolatile memory device including a plurality of blocks, each block including a plurality of physical pages. The method includes receiving a plurality of logical pages associated with a first plurality of logical addresses, respectively, and writing the first plurality of logical pages to the plurality physical addresses according to an ascending order of the logical addresses of the first plurality of logical pages.

Abstract translation: 至少一个示例性实施例公开了一种控制包括多个块的非易失性存储器件的方法，每个块包括多个物理页。 该方法包括分别接收与第一多个逻辑地址相关联的多个逻辑页面，并根据第一多个逻辑页面的逻辑地址的升序将多个逻辑页面写入多个物理地址。

公开(公告)号：US09792176B2

公开(公告)日：2017-10-17

申请号：US14941051

申请日：2015-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Evgeny Blaichman ,  Moshe Twitto ,  Avner Dor ,  Elona Erez ,  Jun Jin Kong ,  Shay Landis ,  Yaron Shany ,  Yoav Shereshevski

IPC: G06F11/10 ,  G06F3/06 ,  G11C29/52 ,  H03M13/15

CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/09 ,  H03M13/098 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/23 ,  H03M13/2906 ,  H03M13/2909 ,  H03M13/2927 ,  H03M13/2948 ,  H03M13/2957 ,  H03M13/3707 ,  H03M13/455

Abstract: A memory system includes a memory controller; and a memory device, the memory device including a memory cell array, the memory cell array including least a first memory page having a plurality of memory cells storing a plurality of stored bits, the memory controller being such that, the memory controller performs a first hard read operation on the first memory page to generate a plurality of read bits corresponding to the plurality of stored bits, and if the memory controller determines to change a value of one of a first group of bits, from among the plurality of read bits, the memory controller selects one of the first group of bits based on log likelihood ratio (LLR) values corresponding, respectively, to each of the first group of bits, and changes the value of the selected bit.

公开(公告)号：US09722774B2

公开(公告)日：2017-08-01

申请号：US14699354

申请日：2015-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Michael Kara-Ivanov ,  Vadim Bugaenko ,  Yaron Shany ,  Jun Jin Kong ,  Shay Landis ,  Shmuel Dashevsky

IPC: H04L9/00 ,  H04L9/08 ,  G06F21/44 ,  G06F21/73

CPC classification number: H04L9/002 ,  G06F21/44 ,  G06F21/73 ,  H04L9/0861 ,  H04L9/0866

Abstract: A method generating a cryptographic key and corresponding helper data includes measuring an analog value associated with a physical property of cells of a memory array; digitizing the measured analog value to generate the cryptographic key; quantizing the measured analog value to generate the corresponding non-leaky helper data.

公开(公告)号：US09076533B2

公开(公告)日：2015-07-07

申请号：US13803390

申请日：2013-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Jin Kong ,  Avner Dor ,  Moshe Twitto ,  Shay Landis

IPC: G11C16/10 ,  G11C11/56 ,  G11C16/04 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/349

Abstract: A method of operating a memory device includes programming a first data signal to a first memory cell, attempting to program a second data signal to the first memory cell in a state where the first memory cell is not erased, and marking the first memory cell as blank upon failing to program the second data signal to the first memory cell.

Abstract translation: 操作存储器件的方法包括将第一数据信号编程到第一存储器单元，在第一存储器单元未被擦除的状态下尝试将第二数据信号编程到第一存储器单元，并将第一存储单元标记为 在将第二数据信号编程到第一存储器单元时未被编程。