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公开(公告)号:US12237043B2
公开(公告)日:2025-02-25
申请号:US17984757
申请日:2022-11-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yongseob Kim , Taehyung Kim
Abstract: There are provided an apparatus and method for performing impedance control (ZQ) calibration without a ZQ pin and an external resistor. The apparatus includes an output driver circuit connected to a signal pin interfacing with an external device; a register control word (RCW) configured to store an output driver impedance parameter related to a pull-up output voltage (VOH) condition of the signal pin; and a ZQ calibration circuit connected to the signal pin and configured to perform calibration using a VOH target level of the signal pin and control a termination resistance of the signal pin.
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公开(公告)号:US12225747B2
公开(公告)日:2025-02-11
申请号:US18512352
申请日:2023-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Won Sik Yoon , Ju Hyun Kim , Ha Il Kwon , Kwang Hee Kim , Taehyung Kim , Su Jin Park , Dae Young Chung
IPC: H01L51/50 , H10K50/115 , H10K50/15 , H10K50/16
Abstract: A quantum dot device including an anode and a cathode, a light emitting layer disposed between the anode and the cathode, the light emitting layer comprising quantum dots, a first hole auxiliary layer disposed on the anode, the first hole auxiliary layer including poly(3,4-ethylenedioxythiophene)-polystyrenesulfonate or a derivative thereof (PEDOT:PSS), a second hole auxiliary layer disposed on the first hole auxiliary layer and including a hole transport material different from the PEDOT:PSS, wherein the light emitting layer is disposed on the second hole auxiliary layer, wherein the first hole auxiliary layer has a first surface facing the anode and a second surface facing the second hole auxiliary layer, and the second surface includes a surface modification region including a surface modification material having a carboxylic acid group, a phosphonic acid group, a sulfonic acid group, or a salt thereof. An electronic device that includes the quantum dot device.
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公开(公告)号:US12051696B2
公开(公告)日:2024-07-30
申请号:US17840060
申请日:2022-06-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Taehyung Kim , Panjae Park , Jaeseok Yang
IPC: H01L27/092 , H01L21/8238 , H01L23/528 , H01L29/10 , H01L29/66 , H01L29/78
CPC classification number: H01L27/092 , H01L21/823807 , H01L21/823871 , H01L21/823885 , H01L23/5286 , H01L29/1037 , H01L29/66666 , H01L29/7827
Abstract: A semiconductor device includes a substrate with a first active region; first and second active patterns extending in a first direction and spaced apart in a second direction, and each having a source pattern, a channel pattern, and a drain pattern that are sequentially stacked; first and second gate electrodes that surround the channel patterns of the first and second active patterns and extend in the first direction; an interlayer dielectric layer that covers the first and second active patterns and the first and second gate electrodes; a first active contact that penetrates the interlayer dielectric layer and is coupled to the first active region between the first and second active patterns; and a first power rail on the interlayer dielectric layer and electrically connected to the first active contact, each of the first and second active patterns including an overlapping region that vertically overlaps the first power rail.
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公开(公告)号:US12046653B2
公开(公告)日:2024-07-23
申请号:US17501454
申请日:2021-10-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Bonyeop Kim , Taehyung Kim , Sangshin Han , Sangyeop Baeck
IPC: H01L29/66 , H01L27/092 , H01L29/06 , H01L29/423 , H10B10/00
CPC classification number: H01L29/42392 , H01L27/0924 , H01L29/0673 , H10B10/12
Abstract: An integrated circuit includes: a memory cell block including a plurality of bitcells; and an input and output (I/O) block including a plurality of gate-all-around (GAA) transistors connected to the bitcells, wherein the I/O block includes a plurality of active regions disposed separately from one another in a first direction, each of which extends in a second direction that is vertical to the first direction, and in which the GAA transistors are formed, a plurality of power rails disposed separately from one another in the first direction, and configured to provide power to the GAA transistors, and a plurality of signal lines disposed between the power rails, and configured to provide signals to the GAA transistors, a first number of bitcells among the bitcells are connected to the GAA transistors formed in a second number of active regions among the active regions, and the second number is twice the first number.
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公开(公告)号:US11974494B2
公开(公告)日:2024-04-30
申请号:US15855145
申请日:2017-12-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Takahiro Fujiyama , Keisuke Korai , Katsunori Shibata , Daeyoung Chung , Eunjoo Jang , Taehyung Kim
IPC: C08G61/02 , C08G61/12 , H10K50/11 , H10K50/115 , H10K50/15 , H10K50/17 , H10K85/10 , H10K101/10
CPC classification number: H10K85/115 , C08G61/02 , C08G61/124 , H10K50/115 , H10K85/141 , H10K85/151 , C08G2261/12 , C08G2261/1412 , C08G2261/1414 , C08G2261/1434 , C08G2261/147 , C08G2261/148 , C08G2261/312 , C08G2261/3142 , C08G2261/95 , H10K50/11 , H10K50/15 , H10K50/17 , H10K2101/10
Abstract: A polymer compound including a repeating unit represented by Formula 1:
wherein, in Formula 1, groups and variables are the same as described in the specification.-
6.
公开(公告)号:US20240128164A1
公开(公告)日:2024-04-18
申请号:US18475290
申请日:2023-09-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Youngrok Park , Hoyoung Tang , Taehyung Kim , Sangshin Han
IPC: H01L23/48 , G06F30/392 , G06F30/394 , H01L23/528
CPC classification number: H01L23/481 , G06F30/392 , G06F30/394 , H01L23/5283 , H01L23/5286
Abstract: An integrated circuit may include a bit cell array including a plurality of bit cells and a peripheral region including a peripheral circuit. The peripheral region may include a plurality of devices over a substrate, at least one pattern configured to provide a first voltage to at least one of the plurality of devices, at least one power line extending under the substrate, and at least one first via passing through the substrate in a vertical direction in the peripheral region and electrically connecting the at least one pattern to the at least one power line.
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公开(公告)号:US12183591B2
公开(公告)日:2024-12-31
申请号:US17701846
申请日:2022-03-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dohoon Kim , Wonwoong Chung , Taehyung Kim , Heejun Park , Handuck Song , Heonjong Jeong , Younglae Kim , Byeongok Cho
IPC: H01L21/467 , C09K13/00 , H01L21/311
Abstract: An etching gas composition includes a first organofluorine compound having 3 to 6 carbon atoms, and an organosulfur compound having 1 to 4 sulfur atoms. The organosulfur compound may include a carbon-fluorine (C—F) bond, a carbon-sulfur (C—S) bond, at least one carbon-carbon double (—C═C—) bond. When the etching gas composition is used, excellent etch selectivity may be obtained, and the linearity and verticality of a pattern may be greatly increased by improving line edge roughness (LER) and line width roughness (LWR) due to an improvement in the roughness of an etched surface.
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公开(公告)号:US20240172407A1
公开(公告)日:2024-05-23
申请号:US18389465
申请日:2023-11-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Taehyung Kim
IPC: H10B10/00 , G11C11/412 , G11C11/419 , H01L27/02
CPC classification number: H10B10/12 , G11C11/412 , G11C11/419 , H01L27/0207
Abstract: An integrated circuit includes a cell array comprising cells, each including a transistor, a power rail in a power rail layer under the cell array, the power rail providing power to the cell array, and contacts between the cell array and the power rail. Each contact extends downward from a source of a transistor of a corresponding one of the cells to the power rail.
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公开(公告)号:US20240365528A1
公开(公告)日:2024-10-31
申请号:US18643224
申请日:2024-04-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Changhoon SUNG , Hyojin Cho , Hoyoung Tang , Taehyung Kim , Eojin Lee
IPC: H10B10/00 , G11C5/06 , H01L23/528 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/78 , H01L29/786
CPC classification number: H10B10/125 , G11C5/063 , H01L23/5283 , H01L27/0924 , H01L29/0673 , H01L29/42392 , H01L29/775 , H01L29/7851 , H01L29/78696
Abstract: An integrated circuit is provided and includes a memory cell array, a plurality of gate electrodes extending in a first direction above a substrate, a plurality of word lines extending in the first direction above the substrate, a plurality of bit lines extending below the substrate in a second direction intersecting the first direction, and a plurality of first contacts passing through the substrate in a vertical direction and respectively connected to the plurality of bit lines.
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公开(公告)号:US20240363531A1
公开(公告)日:2024-10-31
申请号:US18626935
申请日:2024-04-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soyeon Kim , Hoyoung Tang , Taehyung Kim
IPC: H01L23/528 , G11C5/06 , G11C11/419 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/78 , H01L29/786 , H10B10/00
CPC classification number: H01L23/5283 , G11C5/063 , G11C11/419 , H01L27/0924 , H01L29/0673 , H01L29/42392 , H01L29/775 , H01L29/7851 , H01L29/78696 , H10B10/125
Abstract: Provided is an integrated circuit including a cell array disposed on a substrate and including a plurality of bit cells, a row decoder including a plurality of word line drivers each providing a plurality of word line signals to the cell array, a backside wiring layer disposed on a back side of the substrate to overlap the row decoder and providing power to the plurality of word line drivers, and a plurality of backside contacts between the row decoder and the backside wiring layer. Each of the plurality of backside contacts extends from a source of at least one transistor included in each of the plurality of word line drivers to the backside wiring layer.
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