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    SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME 有权
    半导体封装及其制造方法

    公开(公告)号：US20170005075A1

    公开(公告)日：2017-01-05

    申请号：US15168236

    申请日：2016-05-30

    申请人： Samsung Electronics Co., Ltd.

    发明人： Hyoungjoo LEE ,  Minsoo KIM ,  Teak Hoon LEE ,  YOUNG KUN JEE

    IPC分类号： H01L25/065 ,  H01L23/498

    CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49838 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/00

    摘要： A semiconductor package includes a first semiconductor chip stacked on a package substrate in which a first surface of the first semiconductor chip faces the package substrate and a second surface that is opposite to the first surface, a second semiconductor chip stacked on the first semiconductor chip that includes a third surface facing the first semiconductor chip and a fourth surface that is opposite to the third surface, and an integral adhesive structure that substantially continuously fills a first space between the package substrate and the first semiconductor chip and a second space between the first and second semiconductor chips. The integral adhesive structure includes an extension protruding from outer sidewalls of the first and second semiconductor chips. The extension has one continuously convex sidewall between a level of the first surface and a level of the fourth surface.

    摘要翻译： 半导体封装包括堆叠在封装基板上的第一半导体芯片，其中第一半导体芯片的第一表面面向封装基板和与第一表面相对的第二表面，堆叠在第一半导体芯片上的第二半导体芯片， 包括面向所述第一半导体芯片的第三表面和与所述第三表面相对的第四表面，以及整体粘合剂结构，其基本上连续地填充所述封装衬底和所述第一半导体芯片之间的第一空间，以及第一空间， 第二个半导体芯片。 整体粘合结构包括从第一和第二半导体芯片的外侧壁突出的延伸部。 该延伸部在第一表面的高度和第四表面的高度之间具有一个连续的凸起的侧壁。

    SEMICONDUCTOR PACKAGE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220293565A1

    公开(公告)日：2022-09-15

    申请号：US17531115

    申请日：2021-11-19

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seung Hun SHIN ,  Un Byoung KANG ,  Yeong Kwon KO ,  Jong Ho LEE ,  Teak Hoon LEE ,  Jun Yeong HEO

    IPC分类号： H01L25/065 ,  H01L23/48 ,  H01L23/498 ,  H01L23/31

    摘要： There is provided a semiconductor device comprising a first semiconductor chip which includes a first chip substrate, and a first through via penetrating the first chip substrate, a second semiconductor chip disposed on the first semiconductor chip, and includes a second chip substrate, and a second through via penetrating the second chip substrate, and a connecting terminal disposed between the first semiconductor chip and the second semiconductor chip to electrically connect the first through via and the second through via. The semiconductor device further comprising an inter-chip molding material which includes a filling portion that fills between the first semiconductor chip and the second semiconductor chip and encloses the connecting terminal, an extension portion that extends along at least a part of a side surface of the second semiconductor chip, and a protruding portion protruding from the extension portion.

    SEMICONDUCTOR PACKAGE
    4.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220093543A1

    公开(公告)日：2022-03-24

    申请号：US17376616

    申请日：2021-07-15

    申请人： Samsung Electronics Co., Ltd.

    发明人： Sunkyoung SEO ,  Teak Hoon LEE ,  Chajea JO

    IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/10

    摘要： A semiconductor package includes a sequential stack of first and second semiconductor chips, and a first internal connection member that connects the first and second semiconductor chips to each other. The first semiconductor chip includes a first substrate that has a first top surface and a first bottom surface that are opposite to each other, and a first conductive pad on the first top surface. The second semiconductor chip includes a second substrate that has a second top surface and a second bottom surface that are opposite to each other, and a second conductive bump on the second bottom surface. The first internal connection member connects the first conductive pad to the second conductive bump. The first conductive pad has a first width in one direction. The second conductive bump has a second width in the one direction. The first width is smaller than the second width.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220020701A1

    公开(公告)日：2022-01-20

    申请号：US17203007

    申请日：2021-03-16

    申请人： Samsung Electronics Co., Ltd.

    发明人： Yeongkwon KO ,  Un-Byoung KANG ,  Jaekyung YOO ,  Teak Hoon LEE

    IPC分类号： H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

    摘要： A semiconductor package including a package substrate, a connection substrate on the package substrate and having on a lower corner of the connection substrate a recession that faces a top surface of the package substrate, a semiconductor chip on the connection substrate, a plurality of first connection terminals connecting the connection substrate to the semiconductor chip, and a plurality of second connection terminals connecting the package substrate to the connection substrate. The recession is laterally spaced apart from the second connection terminals.