公开(公告)号：US09082871B2

公开(公告)日：2015-07-14

申请号：US14619155

申请日：2015-02-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi-Jun Park ,  Won-Keun Kim ,  Teak-Hoon Lee ,  Chang-Seong Jeon ,  Young-Kun Jee

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L21/673 ,  H01L23/48 ,  H01L21/50

CPC classification number: H01L24/81 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L21/673 ,  H01L21/67346 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/32 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00

Abstract: A substrate of a semiconductor package includes a first wiring substrate having a first surface and a second surface facing each other, the first surface having a semiconductor chip mounted thereon, a first support carrier, and an adhesive film connecting the second surface and the first support carrier.

Abstract translation: 半导体封装的基板包括具有第一表面和彼此面对的第二表面的第一布线基板，其上安装有半导体芯片的第一表面，第一支撑载体和将第二表面和第一支撑件连接的粘合膜 载体

公开(公告)号：US08987904B2

公开(公告)日：2015-03-24

申请号：US13900612

申请日：2013-05-23

Applicant: Samsung Electronics Co., Ltd

Inventor： Gi-Jun Park ,  Won-Keun Kim ,  Teak-Hoon Lee ,  Chang-Seong Jeon ,  Young-Kun Jee

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/31 ,  H01L21/56 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L24/81 ,  H01L21/50 ,  H01L21/56 ,  H01L21/563 ,  H01L21/673 ,  H01L21/67346 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/32 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00

Abstract: A substrate of a semiconductor package includes a first wiring substrate having a first surface and a second surface facing each other, the first surface having a semiconductor chip mounted thereon, a first support carrier, and an adhesive film connecting the second surface and the first support carrier.

公开(公告)号：US20220293566A1

公开(公告)日：2022-09-15

申请号：US17552614

申请日：2021-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Sick Park ,  Un-Byoung Kang ,  Jongho Lee ,  Teak-Hoon Lee

IPC: H01L25/065 ,  H01L23/00

Abstract: Disclosed is a semiconductor package with increased thermal radiation efficiency, which includes: a first die having signal and dummy regions and including first vias in the signal region, a second die on the first die and including second vias in the signal region, first die pads on a top surface of the first die and coupled to the first vias, first connection terminals on the first die pads which couple the second vias to the first vias, second die pads in the dummy region and on the top surface of the first die, and second connection terminals on the second die pads and electrically insulated from the first vias and the second vias. Each of the second die pads has a rectangular planar shape whose major axis is provided along a direction that leads away from the signal region.

公开(公告)号：US20140291854A1

公开(公告)日：2014-10-02

申请号：US14041169

申请日：2013-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Teak-Hoon Lee ,  Ji-Hwang Kim ,  Sang-Wook Park ,  Young-Kun Jee

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L25/0657 ,  H01L2224/13 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/15311

Abstract: A semiconductor package includes a first semiconductor chip on a substrate and having a plurality of through-silicon vias (TSVs). A second semiconductor chip having an active layer is on the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the active layer. Connection terminals extend through the adhesive layer and are connected to the TSVs and the active layer. Side surfaces of the adhesive layer are aligned with side surfaces of the second semiconductor chip.

Abstract translation: 半导体封装包括在衬底上的第一半导体芯片，并且具有多个穿硅通孔（TSV）。 具有有源层的第二半导体芯片在第一半导体芯片上。 粘合剂层位于第一半导体芯片和有源层之间。 连接端子延伸穿过粘合剂层并连接到TSV和有源层。 粘合剂层的侧表面与第二半导体芯片的侧表面对齐。

公开(公告)号：US09159651B2

公开(公告)日：2015-10-13

申请号：US14041169

申请日：2013-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Teak-Hoon Lee ,  Ji-Hwang Kim ,  Sang-Wook Park ,  Young-Kun Jee

IPC: H01L23/40 ,  H01L23/52 ,  H01L29/40 ,  H01L23/48

CPC classification number: H01L23/481 ,  H01L25/0657 ,  H01L2224/13 ,  H01L2224/73204 ,  H01L2924/15174 ,  H01L2924/15311

Abstract: A semiconductor package includes a first semiconductor chip on a substrate and having a plurality of through-silicon vias (TSVs). A second semiconductor chip having an active layer is on the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the active layer. Connection terminals extend through the adhesive layer and are connected to the TSVs and the active layer. Side surfaces of the adhesive layer are aligned with side surfaces of the second semiconductor chip.

Abstract translation: 半导体封装包括在衬底上的第一半导体芯片，并且具有多个通硅通孔（TSV）。 具有有源层的第二半导体芯片在第一半导体芯片上。 粘合剂层位于第一半导体芯片和有源层之间。 连接端子延伸穿过粘合剂层并连接到TSV和有源层。 粘合剂层的侧表面与第二半导体芯片的侧表面对齐。