-
公开(公告)号：US20190206816A1
公开(公告)日：2019-07-04
申请号：US16151724
申请日：2018-10-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JINCHAN AHN , Won-young Kim , Chanho Lee
IPC: H01L23/00
Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.
-
公开(公告)号：US09859204B2
公开(公告)日：2018-01-02
申请号：US15230889
申请日：2016-08-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myeong Soon Park , Hyunsoo Chung , Won-young Kim , Ae-nee Jang , Chanho Lee
CPC classification number: H01L23/50 , H01L24/02 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/02371 , H01L2224/02372 , H01L2224/02375 , H01L2224/02377 , H01L2224/02379 , H01L2224/0401 , H01L2224/05 , H01L2224/05553 , H01L2224/05555 , H01L2224/06131 , H01L2224/06135 , H01L2224/06139 , H01L2224/06151 , H01L2224/06152 , H01L2224/06155 , H01L2224/06156 , H01L2224/06159 , H01L2224/0616 , H01L2224/06165 , H01L2224/06169 , H01L2224/06177 , H01L2224/06181 , H01L2224/13022 , H01L2224/131 , H01L2224/1403 , H01L2224/14181 , H01L2224/16227 , H01L2924/014 , H01L2924/00014 , H01L2924/00012 , H01L2224/0613
Abstract: Semiconductor devices with redistribution pads are disclosed. The semiconductor device includes a plurality of electric pads provided on a semiconductor substrate, and a plurality of redistribution pads electrically connected to the electric pads and an outer terminal. The plurality of redistribution pads includes a plurality of first redistribution pads constituting a transmission path for a first electrical signal and at least one second redistribution pad constituting a transmission path for a second electrical signal different from the first electrical signal. The first redistribution pads are arranged on the semiconductor substrate to form at least two rows, and the at least one second redistribution pad is disposed between the at least two rows of the first redistribution pads.
-
公开(公告)号：US20200343204A1
公开(公告)日：2020-10-29
申请号：US16923406
申请日：2020-07-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JINCHAN AHN , Won-young Kim , Chanho Lee
IPC: H01L23/00 , H01L23/522
Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.
-
公开(公告)号：US10141255B2
公开(公告)日：2018-11-27
申请号：US15994004
申请日：2018-05-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： MuSeob Shin , Won-young Kim , Sanghyun Park , Jinchan Ahn
IPC: H01L23/498 , H01L23/48 , H01L23/00 , H01L25/065 , H01L23/31
Abstract: A circuit board and a semiconductor packages therewith are disclosed. The circuit board may include a top surface, on which at least one semiconductor chip is mounted, and a bottom surface, to which at least one outer terminal is coupled. The top surface may include an upper window region, on which an upper conductive pattern electrically connected to the semiconductor chip is provided, and the bottom surface may include a lower window region, on which a lower conductive pattern electrically connected to the upper conductive pattern is provided. Here, a ratio of an area of the lower conductive pattern to an area of the upper conductive pattern may be less than or equal to 1.5.
-
公开(公告)号：US09871180B2
公开(公告)日：2018-01-16
申请号：US14096560
申请日：2013-12-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae-young Choi , Seung-hyun Baik , Won-young Kim , Dae-woo Suh , Sang-hoon Lee , Seung-hyun Hong
CPC classification number: H01L35/26 , B82Y99/00 , H01L35/02 , H01L35/12 , H01L35/14 , H01L35/16 , H01L35/18 , H01L35/24 , Y10S977/742 , Y10S977/948
Abstract: A thermoelectric material includes a stack structure including alternately stacked first and second material layers. The first material layer may include a carbon nano-material. The second material layer may include a thermoelectric inorganic material. The first material layer may include a thermoelectric inorganic material in addition to the carbon nano-material. The carbon nano-material may include, for example, graphene. At least one of the first and second material layers may include a plurality of nanoparticles. The thermoelectric material may further include at least one conductor extending in an out-of-plane direction of the stack structure.
-
Patent Agency Ranking
公开(公告)号：US10985138B2
公开(公告)日：2021-04-20
申请号：US15855205
申请日：2017-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SunWon Kang , Won-young Kim
IPC: H01L25/065 , H01L23/00 , H01L23/498 , H01L23/522 , H01L25/00 , H01L21/56 , H01L21/683 , H01L25/10 , H01L23/31
Abstract: A semiconductor package includes a first interconnect substrate on a first redistribution substrate and having a first opening penetrating the first interconnect substrate. A first semiconductor chip is on the first redistribution substrate and the first opening of the first interconnect substrate. A second redistribution substrate is on the first interconnect substrate and the first semiconductor chip. A second interconnect substrate is on the second redistribution substrate and has a second opening penetrating the second interconnect substrate. A second semiconductor chip is on the second redistribution substrate and in the second opening of the second interconnect substrate.
-
公开(公告)号：US10930618B2
公开(公告)日：2021-02-23
申请号：US16214397
申请日：2018-12-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Won-young Kim
IPC: H01L25/065 , H01L23/00
Abstract: A semiconductor package includes a substrate, a master chip on the substrate, a first slave chip on a top surface of the master chip and partially exposing the top surface of the master chip, the first slave chip having a same size as the master chip and having a same storage capacity as the master chip, and a first chip connector on the exposed top surface of the master chip and coupled to the master chip and the first slave chip.
-
公开(公告)号：US20170084559A1
公开(公告)日：2017-03-23
申请号：US15230889
申请日：2016-08-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myeong Soon Park , Hyunsoo Chung , Won-young Kim , Ae-nee Jang , Chanho Lee
IPC: H01L23/00
CPC classification number: H01L23/50 , H01L24/02 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/02371 , H01L2224/02372 , H01L2224/02375 , H01L2224/02377 , H01L2224/02379 , H01L2224/0401 , H01L2224/05 , H01L2224/05553 , H01L2224/05555 , H01L2224/06131 , H01L2224/06135 , H01L2224/06139 , H01L2224/06151 , H01L2224/06152 , H01L2224/06155 , H01L2224/06156 , H01L2224/06159 , H01L2224/0616 , H01L2224/06165 , H01L2224/06169 , H01L2224/06177 , H01L2224/06181 , H01L2224/13022 , H01L2224/131 , H01L2224/1403 , H01L2224/14181 , H01L2224/16227 , H01L2924/014 , H01L2924/00014 , H01L2924/00012 , H01L2224/0613
Abstract: Semiconductor devices with redistribution pads are disclosed. The semiconductor device includes a plurality of electric pads provided on a semiconductor substrate, and a plurality of redistribution pads electrically connected to the electric pads and an outer terminal. The plurality of redistribution pads includes a plurality of first redistribution pads constituting a transmission path for a first electrical signal and at least one second redistribution pad constituting a transmission path for a second electrical signal different from the first electrical signal. The first redistribution pads are arranged on the semiconductor substrate to form at least two rows, and the at least one second redistribution pad is disposed between the at least two rows of the first redistribution pads.
-
公开(公告)号：US09554467B2
公开(公告)日：2017-01-24
申请号：US14820784
申请日：2015-08-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Won-young Kim
CPC classification number: H05K1/181 , H01L23/48 , H01L24/17 , H01L2224/16225 , H01L2924/0002 , H01L2924/15311 , H01L2924/181 , H05K1/0207 , H05K1/0298 , H05K1/113 , H05K3/4038 , H05K3/4084 , H01L2924/00012 , H01L2924/00
Abstract: Provided is a printed circuit board including a first conductive layer including a first conductive layer including a recessed portion, a protruding portion disposed at a higher level than that of the recessed portion, and a connecting portion connecting the recessed portion with the protruding portion. A second conductive layer is disposed above the recessed portion of the first conductive layer. A core layer is disposed between the first conductive layer and the second conductive layer. An upper solder resist layer is disposed on the second conductive layer. The upper solder resist layer exposes at least a portion of the protruding portion. A lower solder resist layer is disposed below the first conductive layer.
Abstract translation: 提供了一种印刷电路板，包括：第一导电层，包括第一导电层，第一导电层包括凹部，突出部分设置在比凹部更高的位置;以及连接部分，其将凹部与突出部分连接。 第二导电层设置在第一导电层的凹部的上方。 芯层设置在第一导电层和第二导电层之间。 上部阻焊层设置在第二导电层上。 上部阻焊层暴露突出部分的至少一部分。 下部阻焊层设置在第一导电层的下方。
-
公开(公告)号：US11037894B2
公开(公告)日：2021-06-15
申请号：US16923406
申请日：2020-07-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jinchan Ahn , Won-young Kim , Chanho Lee
IPC: H01L23/00 , H01L23/522
Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.
-
-
-
-
-
-
-
-
-
Search Results
13
records
(took 0.015 seconds)
