公开(公告)号：US09040415B2

公开(公告)日：2015-05-26

申请号：US14286108

申请日：2014-05-23

申请人： Samsung Electronics Co., Ltd.

发明人： Sang-Jine Park ,  Bo-Un Yoon ,  Young-Sang Youn ,  Jeong-Nam Han ,  Kee-Sang Kwon ,  Doo-Sung Yun ,  Byung-Kwon Cho ,  Ji-Hoon Cha

IPC分类号： H01L21/4763 ,  H01L29/66

CPC分类号： H01L29/66477 ,  H01L21/02063 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/66553 ,  H01L29/66795 ,  H01L2221/1063

摘要： A method for forming a trench includes etching an oxide layer to form a trench therein, conformally forming a first reaction layer along a surface of the trench, the first reaction layer including a first region on an upper portion of the trench and a second region on a lower portion of the trench, forming a barrier layer by reacting a first amount of etching gas with the first region of the first reaction layer, and etching the oxide layer on a lower portion of the second region by reacting a second amount of etching gas with the second region of the first reaction layer, the second amount of etching gas being greater than the first amount of etching gas.

摘要翻译： 一种用于形成沟槽的方法包括蚀刻氧化物层以在其中形成沟槽，沿着沟槽的表面共形形成第一反应层，第一反应层包括沟槽上部的第一区域和第二区域 沟槽的下部，通过使第一量的蚀刻气体与第一反应层的第一区域反应形成阻挡层，并且通过使第二量的蚀刻气体反应来蚀刻第二区域的下部的氧化物层 与第一反应层的第二区域相比，第二量的蚀刻气体大于第一量的蚀刻气体。

公开(公告)号：US09613811B2

公开(公告)日：2017-04-04

申请号：US14525467

申请日：2014-10-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jae-Jik Baek ,  Sang-Jine Park ,  Bo-Un Yoon ,  Young-Sang Youn ,  Ji-Min Jeong ,  Ji-Hoon Cha

IPC分类号： H01L21/338 ,  H01L21/266 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/66

CPC分类号： H01L21/266 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/66575

摘要： A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.

公开(公告)号：US20150162197A1

公开(公告)日：2015-06-11

申请号：US14525467

申请日：2014-10-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jae-Jik BAEK ,  Sang-Jine Park ,  Bo-Un Yoon ,  Young-Sang Youn ,  Ji-Min Jeong ,  Ji-Hoon Cha

IPC分类号： H01L21/266 ,  H01L21/033 ,  H01L21/8234

CPC分类号： H01L21/266 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/66575

摘要： A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.

摘要翻译： 在基板上依次形成第一保护层，掩模层，第二保护层和光致抗蚀剂层。 通过部分去除光致抗蚀剂层形成光致抗蚀剂图案。 通过使用光致抗蚀剂图案依次蚀刻第二保护层，掩模层和第一保护层来形成离子注入掩模。 离子注入掩模暴露衬底。 将杂质植入由离子注入掩模暴露的衬底的上部。

公开(公告)号：US20180174889A1

公开(公告)日：2018-06-21

申请号：US15885067

申请日：2018-01-31

申请人： Samsung Electronics Co., Ltd.

发明人： Young-Sang Youn ,  Myung-geun Song ,  Ji-hoon Cha ,  Jae-jik Baek ,  Bo-un Yoon ,  Jeong-nam Han

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L21/265 ,  H01L21/8234

摘要： A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.

公开(公告)号：US20170301581A1

公开(公告)日：2017-10-19

申请号：US15637552

申请日：2017-06-29

申请人： Samsung Electronics Co., Ltd.

发明人： Young-Sang Youn ,  Myung-geun Song ,  Ji-hoon Cha ,  Jae-jik Baek ,  Bo-un Yoon ,  Jeong-nam Han

IPC分类号： H01L21/762 ,  H01L21/8234 ,  H01L21/763 ,  H01L21/265

CPC分类号： H01L21/76229 ,  H01L21/2652 ,  H01L21/763 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0657

摘要： A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.

公开(公告)号：US20140206169A1

公开(公告)日：2014-07-24

申请号：US13834118

申请日：2013-03-15

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Ji Hoon Cha ,  Jae-Jik Baek ,  Bo-Un Yoon ,  Young-Sang Youn ,  Jeong-Nam Han

IPC分类号： H01L29/66

CPC分类号： H01L29/66628 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/76229 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/66636 ,  H01L29/7848

摘要： A method of forming a semiconductor device can include providing a plasma nitrided exposed top surface including an active region and an isolation region. The exposed top surface including the active region and the isolation region can be subjected to etching to form a deeper recess in the active region that in the isolation region and an unmerged epitaxial stress film can be grown in the deeper recess.

摘要翻译： 形成半导体器件的方法可以包括提供包括有源区和隔离区的等离子体氮化的暴露顶表面。 包括有源区和隔离区的暴露的顶表面可以进行蚀刻，以在有源区中形成更深的凹槽，在隔离区中形成较深的凹槽，并且在较深的凹槽中可以生长未熔合的外延应力膜。