Method for fabricating a LOCOS MOS device for ESD protection
    7.
    发明授权
    Method for fabricating a LOCOS MOS device for ESD protection 有权
    用于制造用于ESD保护的LOCOS MOS器件的方法

    公开(公告)号:US6140189A

    公开(公告)日:2000-10-31

    申请号:US248630

    申请日:1999-02-11

    CPC分类号: H01L27/0266 Y10S438/981

    摘要: A MOS transistor having a multilevel gate oxide layer is provided for use in an ESD protection circuit. A thick gate oxide layer near the drain insures that the transistor has a relatively large drain to gate breakdown voltage. A thin gate oxide layer near the source permits the gate voltage to turn the transistor on and off with rapid switching speeds. The thick portion of the MOS transistor multilevel gate oxide layer is formed with a local oxidation of silicon (LOCOS) process, while the thin gate layer is formed in a separate step. An ESD protection circuit and method for fabricating the above-mentioned multilevel gate oxide layer MOS transistor are also provided.

    摘要翻译: 提供具有多电平栅氧化层的MOS晶体管用于ESD保护电路中。 在漏极附近的厚栅极氧化层确保晶体管具有相对较大的漏极到栅极击穿电压。 靠近源极的薄栅极氧化层允许栅极电压以快速的开关速度开启和关闭晶体管。 MOS晶体管多电平栅极氧化物层的厚部分由硅(LOCOS)工艺的局部氧化形成,而薄栅极层在单独的步骤中形成。 还提供了用于制造上述多电平栅极氧化物层MOS晶体管的ESD保护电路和方法。

    Semiconductor device with NMOS including Si:C channel region and/or PMOS including SiGe channel region
    8.
    发明授权
    Semiconductor device with NMOS including Si:C channel region and/or PMOS including SiGe channel region 失效
    具有NMOS的半导体器件包括Si:C沟道区和/或包括SiGe沟道区的PMOS

    公开(公告)号:US06774409B2

    公开(公告)日:2004-08-10

    申请号:US10092729

    申请日:2002-03-08

    IPC分类号: H01L218234

    摘要: A semiconductor device comprises: a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed in this order and a gate electrode on the semiconductor substrate with intervention of a gate oxide film, wherein a channel region of the semiconductor device the is formed in the carbon-containing silicon film or wherein a channel region of the semiconductor device is formed in the silicon germanium film.

    摘要翻译: 半导体器件包括:半导体衬底,其上依次形成硅锗膜,含碳硅膜和硅膜,并且在半导体衬底上形成栅电极,其中介入了栅氧化膜,其中沟道区 的半导体器件形成在含碳硅膜中,或者其中半导体器件的沟道区形成在硅锗膜中。