Nano-enabled memory devices and anisotropic charge carrying arrays
    7.
    发明授权
    Nano-enabled memory devices and anisotropic charge carrying arrays 有权
    具有纳米功能的存储器件和各向异性带电载体阵列

    公开(公告)号:US07382017B2

    公开(公告)日:2008-06-03

    申请号:US11695728

    申请日:2007-04-03

    IPC分类号: H01L29/788

    摘要: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

    摘要翻译: 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面,存储器件包括衬底,衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上,在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上,金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中,公开了一种用于对该器件进行充电和/或放电的方法,该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子,并随后从一个或多个点或分子的每个离散能级一次去除单个电子。

    Nano-enabled memory devices and anisotropic charge carrying arrays
    9.
    发明授权
    Nano-enabled memory devices and anisotropic charge carrying arrays 有权
    具有纳米功能的存储器件和各向异性带电载体阵列

    公开(公告)号:US07595528B2

    公开(公告)日:2009-09-29

    申请号:US11018572

    申请日:2004-12-21

    IPC分类号: H01L29/788

    摘要: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

    摘要翻译: 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面,存储器件包括衬底,衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上,在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上,金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中,公开了一种用于对该器件进行充电和/或放电的方法,该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子,并随后从一个或多个点或分子的每个离散能级一次去除单个电子。