公开(公告)号：US06919817B2

公开(公告)日：2005-07-19

申请号：US10253584

申请日：2002-09-25

申请人： Seung-eok Choi ,  Han-soo Kim ,  Young-kyu Jin ,  Hyu-ju Kim ,  Hee-seon Park

发明人： Seung-eok Choi ,  Han-soo Kim ,  Young-kyu Jin ,  Hyu-ju Kim ,  Hee-seon Park

IPC分类号： G06F3/023 ,  H01H3/12 ,  H01H9/02 ,  H01H13/14 ,  H01H27/00 ,  H04N5/00 ,  H04Q9/00 ,  G08C19/00 ,  H03K17/94 ,  H03M11/00

CPC分类号： H01H9/0235 ,  G06F3/0238 ,  H01H2217/022 ,  H01H2221/034 ,  H01H2221/066

摘要： A remote controller includes a main body where a plurality of accommodation portions are provided, at least one selection button accommodated in one of the accommodation portions to be capable of being replaceable, an ID determination portion which determines an ID assigned to the selection button, and a signal generating portion which generates a remote control signal corresponding to the ID determined by the ID determination portion according to operation of the selection button. Thus, since a user can freely arrange buttons at desired positions, a remote controller can be configured suitable for the taste of the user. Also, the remote controller is flexible to addition or removal of functions of electronic apparatuses to be controlled.

摘要翻译： 遥控器包括：设置有多个容纳部的主体，容纳在一个容纳部中以能够更换的至少一个选择按钮，确定分配给选择按钮的ID的ID确定部，以及 信号产生部分，根据选择按钮的操作产生与由ID确定部分确定的ID对应的遥控信号。 因此，由于用户可以将按钮自由地布置在期望的位置，所以遥控器可以被配置成适合用户的口味。 此外，遥控器灵活地添加或移除要控制的电子设备的功能。

公开(公告)号：US09478291B2

公开(公告)日：2016-10-25

申请号：US15176917

申请日：2016-06-08

申请人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

发明人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  H01L23/5226 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7881

摘要： A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

摘要翻译： 具有垂直结构的非易失性存储器件包括具有垂直结构的NAND串。 NAND串包括多个存储单元，并且至少一对第一选择晶体管布置成与多个存储单元的第一端相邻。 多个字线耦合到NAND串的多个存储单元。 第一选择线通常连接到NAND串的至少一对第一选择晶体管。

公开(公告)号：US09373400B2

公开(公告)日：2016-06-21

申请号：US14960839

申请日：2015-12-07

申请人： Sung-Min Hwang ,  Han-soo Kim ,  Sun-il Shim

发明人： Sung-Min Hwang ,  Han-soo Kim ,  Sun-il Shim

IPC分类号： H01L27/115 ,  G11C16/04 ,  G11C16/26 ,  G11C16/08 ,  H01L27/02

CPC分类号： G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  H01L23/48 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes.

公开(公告)号：US08492797B2

公开(公告)日：2013-07-23

申请号：US13081776

申请日：2011-04-07

申请人： Sung-Min Hwang ,  Han-soo Kim ,  Sun-il Shim

发明人： Sung-Min Hwang ,  Han-soo Kim ,  Sun-il Shim

IPC分类号： H01L23/52 ,  H01L29/78

CPC分类号： G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  H01L23/48 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes.

公开(公告)号：US20130044545A1

公开(公告)日：2013-02-21

申请号：US13658461

申请日：2012-10-23

申请人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

发明人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

IPC分类号： G11C16/10

CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  H01L23/5226 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7881

摘要： A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

摘要翻译： 具有垂直结构的非易失性存储器件包括具有垂直结构的NAND串。 NAND串包括多个存储单元，并且至少一对第一选择晶体管布置成与多个存储单元的第一端相邻。 多个字线耦合到NAND串的多个存储单元。 第一选择线通常连接到NAND串的至少一对第一选择晶体管。

公开(公告)号：US20160284729A1

公开(公告)日：2016-09-29

申请号：US15176917

申请日：2016-06-08

申请人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

发明人： Jae-hun Jeong ,  Han-soo Kim ,  Won-seok Cho ,  Jae-hoon Jang ,  Sun-il Shim

IPC分类号： H01L27/115 ,  H01L23/528 ,  G11C16/10 ,  H01L23/522 ,  G11C16/04 ,  G11C16/26

CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  H01L23/5226 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7881

摘要： A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

公开(公告)号：US09154772B2

公开(公告)日：2015-10-06

申请号：US13602694

申请日：2012-09-04

申请人： Ji-bum Moon ,  Han-soo Kim ,  Oh-jae Kwon ,  Won-seok Ahn ,  Seung-hoon Han

发明人： Ji-bum Moon ,  Han-soo Kim ,  Oh-jae Kwon ,  Won-seok Ahn ,  Seung-hoon Han

IPC分类号： G06K9/34 ,  H04N13/02 ,  G06T7/00 ,  G06T15/00

CPC分类号： H04N13/261 ,  G06T15/00

摘要： A method and apparatus for converting two-dimensional (2D) contents into three-dimensional (3D) contents is disclosed. The method including: displaying a frame, the frame containing an object which will be extracted from among plural frames contained in the 2D contents; designating a boundary region of an object to be extracted on the displayed frame, in accordance with a user command through a user interface (UI) for collectively designating a region; generating a trimap based on the designated boundary region including inner and outer regions of the object to be extracted, and extracting the object based on the generated trimap. With this, a user can more conveniently and efficiently convert 2D contents into 3D contents.

摘要翻译： 公开了一种将二维（2D）内容转换成三维（3D）内容的方法和装置。 该方法包括：显示帧，该帧包含将从包含在2D内容中的多个帧中提取的对象; 根据用户命令，通过用于共同指定区域的用户界面（UI）指定要在所显示的帧上提取的对象的边界区域; 基于包含要提取的对象的内部和外部区域的指定边界区域生成微调，并且基于生成的微调提取对象。 因此，用户可以更方便，有效地将2D内容转换为3D内容。

公开(公告)号：US09070587B2

公开(公告)日：2015-06-30

申请号：US13190932

申请日：2011-07-26

申请人： Sung-min Hwang ,  Han-soo Kim

发明人： Sung-min Hwang ,  Han-soo Kim

IPC分类号： H01L29/788 ,  H01L27/115 ,  H01L29/792

CPC分类号： H01L27/11529 ,  H01L27/11524 ,  H01L27/11548 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7889 ,  H01L29/7926

摘要： A vertical structure non-volatile memory device includes semiconductor regions that vertically extend on a substrate, a plurality of memory cell strings that vertically extend on the substrate along sidewalls of the semiconductor regions and include a plurality of memory cells and at least one or more first selection transistors, which are disposed on sides of the memory cells and are adjacent to one another. A plurality of wordlines is connected to the memory cells of the memory cell strings. A first selection line is connected to the selection transistors of the memory cell strings and insulating regions are formed as air gaps between the first selection transistors of the adjacent memory cell strings.

摘要翻译： 垂直结构的非易失性存储器件包括在衬底上垂直延伸的半导体区域，沿着半导体区域的侧壁在衬底上垂直延伸的多个存储单元串，并且包括多个存储单元和至少一个或多个第一 选择晶体管，它们设置在存储单元的侧面并彼此相邻。 多个字线连接到存储单元串的存储单元。 第一选择线连接到存储单元串的选择晶体管，绝缘区形成为相邻存储单元串的第一选择晶体管之间的气隙。

公开(公告)号：US08133784B2

公开(公告)日：2012-03-13

申请号：US12588534

申请日：2009-10-19

申请人： Dew-ill Chung ,  Han-soo Kim ,  Jae-hun Jeong ,  Jin-soo Lim ,  Ki-hyun Kim ,  Ju-young Lim

发明人： Dew-ill Chung ,  Han-soo Kim ,  Jae-hun Jeong ,  Jin-soo Lim ,  Ki-hyun Kim ,  Ju-young Lim

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/8236

CPC分类号： H01L27/11578 ,  G11C16/0483 ,  H01L27/11582

摘要： A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first openings that expose a plurality of first portions of a semiconductor substrate. A plurality of channel layers may be formed in the plurality of first openings so as to coat the plurality of first portions of the semiconductor substrate and side surfaces of the plurality of first openings. A plurality of insulation pillars may be formed on the plurality of channel layers so as to fill the plurality of first openings. The plurality of sacrificial films and insulation films may be further etched to form a plurality of second openings that expose a plurality of second portions of the semiconductor substrate. A plurality of side openings may be formed by removing the plurality of sacrificial films. A plurality of gate dielectric films may be formed on surfaces of the plurality of side openings. A plurality of gate electrodes may be formed on the plurality of gate dielectric films so as to fill the plurality of side openings.

摘要翻译： 根据示例性实施例的制造非易失性存储器件的方法可以包括蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第一部分的多个第一开口。 可以在多个第一开口中形成多个沟道层，以便涂覆半导体衬底的多个第一部分和多个第一开口的侧表面。 可以在多个通道层上形成多个绝缘柱，以填充多个第一开口。 可以进一步蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第二部分的多个第二开口。 可以通过去除多个牺牲膜来形成多个侧开口。 多个栅极电介质膜可以形成在多个侧面开口的表面上。 可以在多个栅极电介质膜上形成多个栅电极，以填充多个侧开口。

公开(公告)号：US20110018036A1

公开(公告)日：2011-01-27

申请号：US12636912

申请日：2009-12-14

申请人： Sung-min Hwang ,  Han-soo Kim ,  Won-seok CHO ,  Jae-hoon Jang ,  Sun-il Shim ,  Jae-hun Jeong ,  Ki-hyun Kim

发明人： Sung-min Hwang ,  Han-soo Kim ,  Won-seok CHO ,  Jae-hoon Jang ,  Sun-il Shim ,  Jae-hun Jeong ,  Ki-hyun Kim

IPC分类号： H01L27/085

CPC分类号： G11C5/06 ,  H01L23/5283 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11517

摘要： A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.

摘要翻译： 垂直非易失性存储器件被构造/制造成包括衬底，每组具有多个垂直分布的存储器晶体管的存储单元串组，使得衬底上多层的存储器，与存储器组合耦合的集成字线 晶体管和字选择线的堆叠。 每组的存储晶体管是一组存储单元串的晶体管，它们设置在衬底上方的相同层中。 字选择线分别连接到集成字线。