Current controlled biasing for current-steering based RF variable gain amplifiers
    1.
    发明授权
    Current controlled biasing for current-steering based RF variable gain amplifiers 有权
    基于电流导向的RF可变增益放大器的电流控制偏置

    公开(公告)号:US08270917B2

    公开(公告)日:2012-09-18

    申请号:US12520513

    申请日:2007-12-20

    IPC分类号: H04B1/04

    CPC分类号: H03G3/3042 H03G1/04

    摘要: An adaptive current control circuit for reduced power consumption and minimized gain shift in a variable gain amplifier. An automatic gain control circuit provides gain control voltages in response to a gain control signal. The gain control voltages are used by the variable gain amplifier to set the gain of the output signal for wireless transmit operations. The adaptive current control circuit receives the same gain control voltages for reducing current to the variable gain amplifier during low gain operation, while providing higher currents during high gain operation. The current that is provided is a hybrid mix of proportional to absolute temperature (PTAT) current and complementary to absolute temperature (CTAT) current for minimizing temperature effects on the gain. The ratio of PTAT current and CTAT current is adjustable for specific temperature ranges to further minimize temperature effects on the gain.

    摘要翻译: 一种自适应电流控制电路,用于降低可变增益放大器的功耗和最小化增益偏移。 自动增益控制电路响应增益控制信号提供增益控制电压。 可变增益放大器使用增益控制电压来设置无线发射操作的输出信号的增益。 自适应电流控制电路在低增益操作期间接收相同的增益控制电压,以减小电流到可变增益放大器,同时在高增益操作期间提供更高的电流。 提供的电流是与绝对温度(PTAT)电流成比例和与绝对温度(CTAT)电流互补的混合混合,以最小化对增益的温度影响。 PTAT电流和CTAT电流的比例可针对特定温度范围进行调节,以进一步降低温度对增益的影响。

    Low noise CMOS transmitter circuit with high range of gain
    3.
    发明授权
    Low noise CMOS transmitter circuit with high range of gain 有权
    低噪声CMOS发射电路具有高增益范围

    公开(公告)号:US07593701B2

    公开(公告)日:2009-09-22

    申请号:US11409092

    申请日:2006-04-24

    IPC分类号: H04B1/04

    摘要: A CMOS automatic gain control (AGC) circuit that receives an analog control voltage and generates a temperature compensated gain voltage to linearly control the gain of a variable gain circuit operating in the sub-threshold region. A PTAT circuit having a resistor network coupled to a current mirror circuit operating in the sub-threshold region establishes a current having an proportional relationship to temperature. This current is used as a supply for a voltage to voltage converter circuit which generates an intermediate voltage in response to the analog control voltage. A linearizing circuit operating in the sub-threshold region pre-conditions the intermediate voltage, which is then applied to a variable gain circuit. The variable gain circuit is operated in the sub-threshold region, and the preconditioned intermediate voltage will control the amount of gain to be substantially linear with respect to the analog control voltage, and with a range of about 85 dB.

    摘要翻译: 一种CMOS自动增益控制(AGC)电路,其接收模拟控制电压并产生温度补偿增益电压,以线性地控制在子阈值区域中工作的可变增益电路的增益。 具有耦合到在次阈值区域中工作的电流镜电路的电阻网络的PTAT电路建立与温度成比例关系的电流。 该电流用作电压到电压转换器电路的电源,其产生响应于模拟控制电压的中间电压。 在亚阈值区域中操作的线性化电路预先规定中间电压,然后将其施加到可变增益电路。 可变增益电路在子阈值区域中工作,并且预处理的中间电压将控制增益量相对于模拟控制电压基本上线性,并且在约85dB的范围内。

    Method for correcting differential output mismatch in a passive CMOS mixer circuit
    4.
    发明授权
    Method for correcting differential output mismatch in a passive CMOS mixer circuit 有权
    用于校正无源CMOS混频器电路中的差分输出失配的方法

    公开(公告)号:US07859270B2

    公开(公告)日:2010-12-28

    申请号:US12493357

    申请日:2009-06-29

    IPC分类号: G01R35/00 H04B1/26 H04B17/00

    摘要: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were use

    摘要翻译: 一种具有用于平衡两个输出路径的电气特性的失配校正电路的无源CMOS差分混频器电路。 一旦差分电路的输出路径平衡或尽可能匹配,可以抑制二阶互调乘积的产生或至少降低到可接受的水平。 失配校正电路接收数字偏移信号,并产生一个或多个电压信号以选择性地施加到无源差分混频器电路的信号路径。 电压信号可以调节施加到所选晶体管的体积端子的反向栅极偏置电压以调整其阈值电压,或者可以将电压信号调整为直接施加到选定信号路径的共模电压。 由于差分混频器电路是无源的,所以不产生直流电流对噪声的贡献。 混合器电路的开关晶体管可以保持在最小的尺寸以减少开关信号驱动负载,导致比如果使用更大的开关晶体管时更低的功耗和更高的工作频率

    SYSTEM FOR REDUCING SECOND ORDER INTERMODULATION PRODUCTS FROM DIFFERENTIAL CIRCUITS
    5.
    发明申请
    SYSTEM FOR REDUCING SECOND ORDER INTERMODULATION PRODUCTS FROM DIFFERENTIAL CIRCUITS 有权
    用于减少不同电路中的第二订单间隔产品的系统

    公开(公告)号:US20090261887A1

    公开(公告)日:2009-10-22

    申请号:US12493357

    申请日:2009-06-29

    IPC分类号: G06G7/12

    摘要: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were use

    摘要翻译: 一种具有用于平衡两个输出路径的电气特性的失配校正电路的无源CMOS差分混频器电路。 一旦差分电路的输出路径平衡或尽可能匹配,可以抑制二阶互调乘积的产生或至少降低到可接受的水平。 失配校正电路接收数字偏移信号,并产生一个或多个电压信号以选择性地施加到无源差分混频器电路的信号路径。 电压信号可以调节施加到所选晶体管的体积端子的反向栅极偏置电压以调整其阈值电压,或者可以将电压信号调整为直接施加到选定信号路径的共模电压。 由于差分混频器电路是无源的,所以不产生直流电流对噪声的贡献。 混合器电路的开关晶体管可以保持在最小的尺寸以减少开关信号驱动负载,导致比如果使用更大的开关晶体管时更低的功耗和更高的工作频率

    System for reducing second order intermodulation products from differential circuits
    6.
    发明授权
    System for reducing second order intermodulation products from differential circuits 有权
    用于从差分电路减少二阶互调产物的系统

    公开(公告)号:US07554380B2

    公开(公告)日:2009-06-30

    申请号:US11298667

    申请日:2005-12-12

    IPC分类号: G06G7/16

    摘要: A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were used.

    摘要翻译: 一种具有用于平衡两个输出路径的电气特性的失配校正电路的无源CMOS差分混频器电路。 一旦差分电路的输出路径平衡或尽可能匹配,可以抑制二阶互调乘积的产生或至少降低到可接受的水平。 失配校正电路接收数字偏移信号,并产生一个或多个电压信号以选择性地施加到无源差分混频器电路的信号路径。 电压信号可以调节施加到所选晶体管的体积端子的反向栅极偏置电压以调整其阈值电压,或者可以将电压信号调整为直接施加到选定信号路径的共模电压。 由于差分混频器电路是无源的,所以不产生直流电流对噪声的贡献。 混合电路的开关晶体管可以维持在最小的尺寸以减少开关信号驱动负载,导致比使用更大的开关晶体管时更低的功耗和更高的工作频率。

    Low supply regulator having a high power supply rejection ratio
    7.
    发明授权
    Low supply regulator having a high power supply rejection ratio 有权
    低电源调节器具有高电源抑制比

    公开(公告)号:US08669754B2

    公开(公告)日:2014-03-11

    申请号:US13081239

    申请日:2011-04-06

    IPC分类号: G05F3/16

    CPC分类号: H04B15/06

    摘要: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.

    摘要翻译: 用于诸如压控振荡器(VCO)的功能电路的电源噪声抑制电路。 电源噪声抑制电路包括连接到电压源的隔离晶体管,用于在整个频率范围内提供基本上没有噪声的输出电流和电压。 电流源,二极管连接的参考晶体管,其电阻装置连接在其栅极和漏极端子之间,并且串联连接在电压源和地之间的虚拟电路产生施加到隔离晶体管的栅极的偏置电压。 虚拟电路模拟功能电路的DC特性,使得输出电流跟踪过程和温度变化。 隔离晶体管和参考晶体管可以具有负阈值电压,并且该电路可以包括用于从参考晶体管和隔离晶体管的栅极引出电流的放电装置。

    Wireless communication system with variable intermediate frequency transmitter
    9.
    发明授权
    Wireless communication system with variable intermediate frequency transmitter 有权
    具有可变中频发射机的无线通信系统

    公开(公告)号:US07359684B2

    公开(公告)日:2008-04-15

    申请号:US10012869

    申请日:2001-11-06

    摘要: A wireless communication device (UST), comprising an input for receiving baseband data (I, Q) in a first signal having a first frequency. The device also comprises circuitry (681, 682) for increasing the first frequency, to form a second signal having a second frequency, in response to a first frequency reference signal (IF2), and the device comprises circuitry (74) for increasing the second frequency, to form a third signal having a third frequency, in response to a second frequency reference signal (LO2). Lastly, the device comprises an antenna (ATU2) for transmitting the baseband data at a final transmission frequency selected as a band within a predetermined set of frequency bands. With reference to the preceding, the first frequency reference signal and the second frequency reference signal are variable and are selected in response to the final transmission frequency which is a particular band selected as a different band at different times and from the predetermined set of frequency bands.

    摘要翻译: 一种无线通信设备(UST),包括用于在具有第一频率的第一信号中接收基带数据(I,Q)的输入。 该装置还包括用于增加第一频率的电路(68 1,68 2 2),以响应于第一频率参考信号形成具有第二频率的第二信号 (IF 2 2),并且该装置包括用于响应于第二频率参考信号(LO 2)而增加第二频率以形成具有第三频率的第三信号的电路(74) )。 最后,该设备包括用于以选定为预定频带组内的频带的最终传输频率发送基带数据的天线(ATU 2)。 参考前述,第一频率参考信号和第二频率参考信号是可变的,并且是响应于作为在不同时间被选择为不同频带的特定频带的最终发射频率和从预定频带组中​​选择的 。

    Digital detection of blockers for wireless receiver
    10.
    发明申请
    Digital detection of blockers for wireless receiver 有权
    无线接收机阻塞器的数字检测

    公开(公告)号:US20060055579A1

    公开(公告)日:2006-03-16

    申请号:US11203717

    申请日:2005-08-15

    IPC分类号: H03M1/12

    CPC分类号: H03M3/36 H03M3/486 H03M3/49

    摘要: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver. In an embodiment, the in-phase analog-to-digital converter 112 and the in-phase digital filter 114 comprise an intermediate frequency receiver.

    摘要翻译: 提供接收器100。 接收器100包括同相模拟数字转换器112,其可操作以检测同相模数转换器112的饱和状态,并调整由同相模数转换器112处理的同相信号的振幅 模数转换器112以从饱和状态除去同相模数转换器112;以及同相数字滤波器114,其可操作以调整施加到同相数字滤波器114的数字输入的增益 来自同相模数转换器112的增益基本上与由同相模数转换器112处理的同相信号的振幅的调整成反比地成比例。在一个实施例中 接收器100还包括基本上类似于同相路径的正交路径,并且同相路径和正交路径包括直接转换接收器。 在一个实施例中,同相模数转换器112和同相数字滤波器114包括中频接收器。