公开(公告)号：US20070090986A1

公开(公告)日：2007-04-26

申请号：US11583848

申请日：2006-10-20

申请人： Shigeyuki Komatsu ,  Ichiro Yamane

发明人： Shigeyuki Komatsu ,  Ichiro Yamane

IPC分类号： H03M1/12

CPC分类号： H03M1/0827 ,  H03M1/468 ,  H03M1/68 ,  H03M1/785 ,  H03M1/804

摘要： An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.

摘要翻译： 模拟数字转换器包括半导体衬底上的模拟开关，模拟开关具有P沟道晶体管和N沟道晶体管; 以及具有第一电极和第二电极的电容元件。 第一电极和第二电极形成在与模拟开关的层不同的区域中，该区域在模拟开关上延伸。 第一电极和第二电极具有与P沟道晶体管和N沟道晶体管的源极区域和漏极区域的布置图案不同的梳状图案。

公开(公告)号：US08081525B2

公开(公告)日：2011-12-20

申请号：US12485253

申请日：2009-06-16

申请人： Shigeyuki Komatsu ,  Ichiro Yamane

发明人： Shigeyuki Komatsu ,  Ichiro Yamane

IPC分类号： G11C7/00

CPC分类号： H01L27/105 ,  G11C11/005 ,  G11C14/00 ,  G11C14/0063 ,  H01L27/0207 ,  H01L27/11 ,  H01L27/1116 ,  H01L27/11226 ,  H01L27/11293

摘要： A combination memory device including a static random access memory (SRAM) and a read only memory (ROM) comprises first memory cells and second memory cells arranged in rows and columns, in which each of the first memory cells includes an SRAM cell and a ROM cell and is arranged adjacent to at least one of the second memory cells, and each of the second memory cells includes an SRAM cell and does not include a ROM cell.

摘要翻译： 包括静态随机存取存储器（SRAM）和只读存储器（ROM）的组合存储器件包括排列成行和列的第一存储器单元和第二存储器单元，其中每个第一存储器单元包括SRAM单元和ROM 并且被布置为与第二存储器单元中的至少一个相邻，并且每个第二存储器单元包括SRAM单元，并且不包括ROM单元。

公开(公告)号：US07394416B2

公开(公告)日：2008-07-01

申请号：US11583848

申请日：2006-10-20

申请人： Shigeyuki Komatsu ,  Ichiro Yamane

发明人： Shigeyuki Komatsu ,  Ichiro Yamane

IPC分类号： H03M1/00

CPC分类号： H03M1/0827 ,  H03M1/468 ,  H03M1/68 ,  H03M1/785 ,  H03M1/804

摘要： An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.

摘要翻译： 模拟数字转换器包括半导体衬底上的模拟开关，模拟开关具有P沟道晶体管和N沟道晶体管; 以及具有第一电极和第二电极的电容元件。 第一电极和第二电极形成在与模拟开关的层不同的区域中，该区域在模拟开关上延伸。 第一电极和第二电极具有与P沟道晶体管和N沟道晶体管的源极区域和漏极区域的布置图案不同的梳状图案。

公开(公告)号：US08304857B2

公开(公告)日：2012-11-06

申请号：US12839688

申请日：2010-07-20

申请人： Shigeyuki Komatsu

发明人： Shigeyuki Komatsu

IPC分类号： H01L23/48

CPC分类号： H01L21/823871 ,  G01R31/2884 ,  H01L21/823475 ,  H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L27/02 ,  H01L27/0207 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043

摘要： A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and assembly are provided in a first area above a main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, and a plurality of assembly pads which are not used in the probing test are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test being not permitted in the second area.

摘要翻译： 一种半导体器件，其中可能没有尺寸减小而没有低于焊盘的功能器件被应力损坏。 半导体器件具有在半导体衬底上方的多个焊盘作为用于外部连接的端子。 在探测测试和组装两者中使用的多个双重使用焊盘设置在半导体衬底的主表面上方的第一区域中，在第一区域允许在探测测试期间由探头施加压力，以及 在半导体衬底的主表面上方的第二区域中设置有不在探测试验中使用的多个组装衬垫，在第二区域不允许在探测试验期间由探头施加压力。

公开(公告)号：US20100283156A1

公开(公告)日：2010-11-11

申请号：US12839688

申请日：2010-07-20

申请人： Shigeyuki Komatsu

发明人： Shigeyuki Komatsu

IPC分类号： H01L23/495

CPC分类号： H01L21/823871 ,  G01R31/2884 ,  H01L21/823475 ,  H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L27/02 ,  H01L27/0207 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043

摘要： A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and assembly are provided in a first area above a main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, and a plurality of assembly pads which are not used in the probing test are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test being not permitted in the second area.

摘要翻译： 一种半导体器件，其中可能没有尺寸减小而没有低于焊盘的功能器件被应力损坏。 半导体器件具有在半导体衬底上方的多个焊盘作为用于外部连接的端子。 在探测测试和组装两者中使用的多个双重使用焊盘设置在半导体衬底的主表面上方的第一区域中，在第一区域允许在探测测试期间由探头施加压力，以及 在半导体衬底的主表面上方的第二区域中设置有不在探测试验中使用的多个组装衬垫，在第二区域不允许在探测试验期间由探头施加压力。

公开(公告)号：US20080308798A1

公开(公告)日：2008-12-18

申请号：US10593277

申请日：2005-03-15

申请人： Shigeyuki Komatsu

发明人： Shigeyuki Komatsu

IPC分类号： H01L23/50

CPC分类号： H01L21/823871 ,  G01R31/2884 ,  H01L21/823475 ,  H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L27/02 ,  H01L27/0207 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043

摘要： A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and assembly are provided in a first area above a main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, and a plurality of assembly pads which are not used in the probing test are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test being not permitted in the second area.

摘要翻译： 一种半导体器件，其中可能没有尺寸减小而没有低于焊盘的功能器件被应力损坏。 半导体器件具有在半导体衬底上方的多个焊盘作为用于外部连接的端子。 在探测测试和组装两者中使用的多个双重使用焊盘设置在半导体衬底的主表面上方的第一区域中，在第一区域允许在探测测试期间由探头施加压力，以及 在半导体衬底的主表面上方的第二区域中设置有不在探测试验中使用的多个组装衬垫，在第二区域不允许在探测试验期间由探头施加压力。

公开(公告)号：US07015588B2

公开(公告)日：2006-03-21

申请号：US10701641

申请日：2003-11-06

申请人： Shigeyuki Komatsu

发明人： Shigeyuki Komatsu

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L21/761 ,  H01L23/5286 ,  H01L23/552 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05556 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01076 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011

摘要： According to a semiconductor device of the present invention, a layer of an electric insulator is provided on a semiconductor substrate. A connection pad having a part exposed to a layer surface is provided in the layer. A transistor structure opposed to the connection pad across the electric insulator is provided on the semiconductor substrate. The transistor structure comprises a polysilicon gate opposed to the connection pad across the insulator in the thickness direction of the layer, and a diffusion region provided outside of the respective opposed side edges of the polysilicon gate on a plane where the polysilicon gate is formed. As a result, according to the present invention, a power supply noise between I/O is absorbed and there is provided an excellent effect on an EMI and an EMS especially.

摘要翻译： 根据本发明的半导体器件，在半导体衬底上设置电绝缘体层。 具有暴露于层表面的部分的连接垫设置在该层中。 在半导体衬底上设置与跨越电绝缘体的连接焊盘相对的晶体管结构。 晶体管结构包括在层的厚度方向上跨过绝缘体的连接焊盘相对的多晶硅栅极，以及在形成多晶硅栅极的平面上设置在多晶硅栅极的相对的相对侧边缘外侧的扩散区域。 结果，根据本发明，I / O之间的电源噪声被吸收，特别是对EMI和EMS提供了极好的效果。

公开(公告)号：US07777223B2

公开(公告)日：2010-08-17

申请号：US10593277

申请日：2005-03-15

申请人： Shigeyuki Komatsu

发明人： Shigeyuki Komatsu

IPC分类号： H01L23/58

CPC分类号： H01L21/823871 ,  G01R31/2884 ,  H01L21/823475 ,  H01L22/32 ,  H01L24/05 ,  H01L24/06 ,  H01L27/02 ,  H01L27/0207 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19043

摘要： A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and assembly are provided in a first area above a main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, and a plurality of assembly pads which are not used in the probing test are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test being not permitted in the second area.

摘要翻译： 一种半导体器件，其中可能没有尺寸减小而没有低于焊盘的功能器件被应力损坏。 半导体器件具有在半导体衬底上方的多个焊盘作为用于外部连接的端子。 在探测测试和组装两者中使用的多个双重使用焊盘设置在半导体衬底的主表面上方的第一区域中，在第一区域允许在探测测试期间由探头施加压力，以及 在半导体衬底的主表面上方的第二区域中设置有不在探测试验中使用的多个组装衬垫，在第二区域不允许在探测试验期间由探头施加压力。

公开(公告)号：US5408672A

公开(公告)日：1995-04-18

申请号：US976400

申请日：1992-11-13

申请人： Hideo Miyazawa ,  Shigeyuki Komatsu ,  Michio Yoshida ,  Toshiaki Suzuki ,  Akito Miyamoto ,  Azuma Miyazawa ,  Toshiaki Ishimaru

发明人： Hideo Miyazawa ,  Shigeyuki Komatsu ,  Michio Yoshida ,  Toshiaki Suzuki ,  Akito Miyamoto ,  Azuma Miyazawa ,  Toshiaki Ishimaru

IPC分类号： G06F9/26 ,  G06F9/445 ,  G06F9/06 ,  G06F12/12 ,  G06F13/40

CPC分类号： G06F8/66 ,  G06F9/268 ,  G06F9/328

摘要： When an error is found in a program of the microcomputer, there are stored in a writable memory change address data of an address of a wrong instruction to be subjected to modification or insertion in the read-only memory, change instruction codes of modification or insertion for replacement of the wrong instruction, and a control code controlling a second program counter. When the contents of the program counter match the change address data stored in the writable memory, the program data in the writable memory is executed in place of the wrong instruction in the read-only memory according to the control code controlling the second program counter. Consequently, even when a bug is found in the program, a program replacement and/or insertion can be easily achieved and it is unnecessary to discard the final product on which the program is developed through a mask. Moreover, the program can be easily changed from an external device. This facilitates determining the cause of troubles occurring in the one-chip microcomputer incorporated in an electronic apparatus and hence improves reliability of the apparatus.

摘要翻译： 当在微计算机的程序中发现错误时，存储在可写存储器中的改变或插入到只读存储器中的错误指令的地址的改变地址数据，改变或插入的改变指令代码 用于替换错误的指令，以及控制代码来控制第二程序计数器。 当程序计数器的内容与存储在可写存储器中的改变地址数据匹配时，根据控制第二程序计数器的控制代码，代替只读存储器中的错误指令执行可写存储器中的程序数据。 因此，即使在程序中发现错误，也可以容易地实现程序更换和/或插入，并且不需要通过掩码丢弃开发程序的最终产品。 此外，程序可以从外部设备轻松更改。 这有助于确定在电子设备中结合的单片微计算机中发生故障的原因，从而提高了设备​​的可靠性。