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1.发明授权Etching method using mixed gas and method for manufacturing semiconductor device 有权使用混合气体的蚀刻方法和制造半导体器件的方法公开(公告)号：US09230826B2
公开(公告)日：2016-01-05
申请号：US13213130
申请日：2011-08-19
IPC分类号： H01L21/20 , H01L21/3213 , H01L29/66 , H01L29/786
CPC分类号： H01L21/32137 , H01L29/6675 , H01L29/66765 , H01L29/78663 , H01L29/78669 , H01L29/78672 , H01L29/78678 , H01L29/78687
摘要： A method for etching is provided in which the etching selectivity of an amorphous semiconductor film to a crystalline semiconductor film is high. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas of a Br-based gas, a F-based gas, and an oxygen gas, so that part of the crystalline semiconductor film provided in the stacked semiconductor film is exposed. Reduction in the film thickness of the exposed portion can be suppressed by performing the etching in such a manner. Moreover, when etching for forming a back channel portion of a thin film transistor is performed with the method for etching, favorable electric characteristics of the thin film transistor can be obtained. An insulating layer is preferably provided over the thin film transistor.
摘要翻译： 提供了一种用于蚀刻的方法，其中非晶半导体膜对结晶半导体膜的蚀刻选择性高。 使用Br基气体，F系气体和氧气的混合气体蚀刻在结晶半导体膜上设置非晶半导体膜的层叠半导体膜的一部分，使部分结晶半导体 提供在堆叠的半导体膜中的膜被暴露。 可以通过以这种方式进行蚀刻来抑制曝光部分的膜厚度的降低。 此外，当利用蚀刻方法进行用于形成薄膜晶体管的背沟道部分的蚀刻时，可以获得薄膜晶体管的良好的电特性。 绝缘层优选设置在薄膜晶体管的上方。
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公开(公告)号：US08476122B2
公开(公告)日：2013-07-02
申请号：US13273267
申请日：2011-10-14
申请人： Shinya Sasagawa , Hiroshi Fujiki
发明人： Shinya Sasagawa , Hiroshi Fujiki
IPC分类号： H01L21/00
CPC分类号： H01L21/32137 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A method for manufacturing a semiconductor device with high electric characteristics is provided. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas including an HBr gas, a CF4 gas, and an oxygen gas, so that part of the crystalline semiconductor film provided in the stacked semiconductor film is exposed. Etching for forming a back channel portion of a thin film transistor is performed with the method for etching, whereby high electric characteristics can be provided for the thin film transistor.
摘要翻译： 提供一种制造具有高电特性的半导体器件的方法。 使用包含HBr气体，CF4气体和氧气的混合气体蚀刻在结晶半导体膜上设置非晶半导体膜的层叠半导体膜的一部分，使得设置在晶体半导体膜中的部分结晶半导体膜 堆叠的半导体膜被暴露。 通过蚀刻方法进行用于形成薄膜晶体管的背沟道部分的蚀刻，由此可以为薄膜晶体管提供高电特性。
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公开(公告)号：US09093539B2
公开(公告)日：2015-07-28
申请号：US13466664
申请日：2012-05-08
IPC分类号： H01L29/786 , H01L21/336 , H01L21/36 , H01L29/66 , H01L27/12 , H01L21/02
CPC分类号： H01L29/66969 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/7869 , H01L29/78696
摘要： To establish a processing technique in manufacture of a semiconductor device including an In—Sn—Zn—O-based semiconductor. An In—Sn—Zn—O-based semiconductor layer is selectively etched by dry etching with the use of a gas containing chlorine such as Cl2, BCl3, SiCl4, or the like. In formation of a source electrode layer and a drain electrode layer, a conductive layer on and in contact with the In—Sn—Zn—O-based semiconductor layer can be selectively etched with little removal of the In—Sn—Zn—O-based semiconductor layer with the use of a gas containing oxygen or fluorine in addition to a gas containing chlorine.
摘要翻译： 为了建立包括In-Sn-Zn-O类半导体的半导体器件的制造中的加工技术。 通过使用含氯气体如Cl 2，BCl 3，SiCl 4等的干蚀刻来选择性地蚀刻In-Sn-Zn-O系半导体层。 在形成源极电极层和漏电极层时，可以选择性地蚀刻与In-Sn-Zn-O系半导体层接触的导电层，同时很少去除In-Sn-Zn-O系半导体层， 除了含有氯的气体之外，还使用含有氧或氟的气体。
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4.发明授权Semiconductor device including channel formation region including oxide semiconductor 有权包括包括氧化物半导体的沟道形成区域的半导体器件公开(公告)号：US08901554B2
公开(公告)日：2014-12-02
申请号：US13484742
申请日：2012-05-31
申请人： Shinya Sasagawa , Hiroshi Fujiki , Yoshinori Ieda
发明人： Shinya Sasagawa , Hiroshi Fujiki , Yoshinori Ieda
IPC分类号： H01L29/10 , H01L29/786 , H01L29/417 , H01L29/66 , H01L21/02
CPC分类号： H01L29/66969 , H01L21/02164 , H01L21/02178 , H01L21/02554 , H01L21/02565 , H01L21/47573 , H01L29/41733 , H01L29/66742 , H01L29/7869
摘要： A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.
摘要翻译： 与氧化物半导体膜和第二绝缘膜接触的第一绝缘膜依次层叠在包含氧化物半导体膜的晶体管的电极膜上，在第二绝缘膜上形成蚀刻掩模， 通过蚀刻第一绝缘膜的一部分和第二绝缘膜的一部分形成电极膜，将暴露于电极膜的开口部暴露于氩等离子体中，除去蚀刻掩模，并且在开口中形成导电膜 部分暴露电极膜。 第一绝缘膜是其氧气通过加热部分释放的绝缘膜。 第二绝缘膜比第一绝缘膜不易蚀刻，并且具有比第一绝缘膜更低的透气性。
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公开(公告)号：US20120094445A1
公开(公告)日：2012-04-19
申请号：US13273267
申请日：2011-10-14
申请人： Shinya Sasagawa , Hiroshi Fujiki
发明人： Shinya Sasagawa , Hiroshi Fujiki
IPC分类号： H01L21/336 , H01L21/306 , H01L21/20
CPC分类号： H01L21/32137 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A method for manufacturing a semiconductor device with high electric characteristics is provided. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas including an HBr gas, a CF4 gas, and an oxygen gas, so that part of the crystalline semiconductor film provided in the stacked semiconductor film is exposed. Etching for forming a back channel portion of a thin film transistor is performed with the method for etching, whereby high electric characteristics can be provided for the thin film transistor.
摘要翻译： 提供一种制造具有高电特性的半导体器件的方法。 使用包含HBr气体，CF4气体和氧气的混合气体蚀刻在结晶半导体膜上设置非晶半导体膜的层叠半导体膜的一部分，使得设置在晶体半导体膜中的部分结晶半导体膜 堆叠的半导体膜被暴露。 通过蚀刻方法进行用于形成薄膜晶体管的背沟道部分的蚀刻，由此可以为薄膜晶体管提供高电特性。
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公开(公告)号：US08305434B2
公开(公告)日：2012-11-06
申请号：US12771256
申请日：2010-04-30
申请人： Masayuki Nakatsuka , Hiroshi Fujiki
发明人： Masayuki Nakatsuka , Hiroshi Fujiki
CPC分类号： H04N5/2352 , G02B21/365 , H04N5/2354 , H04N5/243 , H04N5/345
摘要： A photographing control unit comprising a drive signal generator, an analog front end, a synchronization signal generation unit, and a system control unit controls an imager under a predetermined photographing condition, so that the imager photographs an observation image of a sample observed by a microscope and formed on a light receiving surface of the imager. A computing unit obtains inputs of a plurality of photographing parameters, determines a photographing condition based on the obtained photographing parameters, and sets the photographing condition for the photographing control unit. A display unit displays the designable ranges of the photographing parameters. Here, when the computing unit obtains the input of a priority parameter, it changes the designable range of the plurality of photographing parameters other than the priority parameter based on the priority parameter and causes the display unit to display the designable range after the change.
摘要翻译： 包括驱动信号发生器，模拟前端，同步信号产生单元和系统控制单元的拍摄控制单元在预定拍摄条件下控制成像器，使得成像器拍摄由显微镜观察到的样本的观察图像 并形成在成像器的光接收表面上。 计算单元获得多个拍摄参数的输入，基于所获得的拍摄参数确定拍摄条件，并设置拍摄控制单元的拍摄条件。 显示单元显示拍摄参数的可设定范围。 这里，当计算单元获得优先级参数的输入时，基于优先级参数改变除了优先级参数之外的多个拍摄参数的可设定范围，并使显示单元在改变之后显示可设置范围。
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公开(公告)号：US08179433B2
公开(公告)日：2012-05-15
申请号：US12332534
申请日：2008-12-11
申请人： Hiroshi Fujiki
发明人： Hiroshi Fujiki
CPC分类号： H04N5/3765 , G02B21/367 , H04N5/341
摘要： The microscopic imaging apparatus includes a system controlling unit for obtaining a VD time setting value, and for obtaining the number of electric charge subtracting pulses, a synchronization signal generating unit for generating a vertical synchronization signal on the basis of the VD time setting value output from the system controlling unit and the horizontal synchronization signal, and a timing generating unit for extracting the electric charge of the imaging device by supplying the horizontal synchronization signal by the number of electric charge subtracting pulses to the imaging device as the electric charge subtracting pulses, and for generating a read pulse synchronous with the vertical synchronization signal in order to stop the accumulation of the electric charge of the imaging device after exposure is started.
摘要翻译： 微型成像装置包括用于获得VD时间设定值并用于获得电荷减去脉冲数的系统控制单元，用于根据从...输出的VD时间设定值产生垂直同步信号的同步信号产生单元 系统控制单元和水平同步信号;以及定时生成单元，用于通过将水平同步信号提供给成像装置的电荷减去脉冲数来提取成像装置的电荷作为电荷减去脉冲，以及 用于产生与垂直同步信号同步的读取脉冲，以便在曝光开始之后停止成像装置的电荷的累积。
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公开(公告)号：US07182921B2
公开(公告)日：2007-02-27
申请号：US10477663
申请日：2002-06-03
申请人： Toshiyasu Miura , Jun Komiya , Hiroshi Fujiki , Naohiko Fujiwara
发明人： Toshiyasu Miura , Jun Komiya , Hiroshi Fujiki , Naohiko Fujiwara
CPC分类号： B01J8/0492 , B01J8/0465 , B01J8/0496 , B01J2208/00203 , B01J2208/00495 , B01J2208/00504 , B01J2208/0053 , C01B3/384 , C01B3/48 , C01B2203/0233 , C01B2203/0283 , C01B2203/044 , C01B2203/047 , C01B2203/066 , C01B2203/0811 , C01B2203/0816 , C01B2203/0822 , C01B2203/0827 , C01B2203/0844 , C01B2203/0866 , C01B2203/0894 , C01B2203/1011 , C01B2203/1023 , C01B2203/80 , C01B2203/82 , Y02P20/128
摘要： A cylindrical steam reforming unit contains a plurality of cylindrical bodies consisting of a first cylindrical body, a second cylindrical body and a third cylindrical body of successively increasing diameters disposed in concentric spaced relationship, a radiation cylinder disposed within and concentrically with the first cylindrical body, a burner disposed in the radial central portion of the radiation cylinder, and a reforming catalyst layer with a reforming catalyst filled in a gap between the first and second cylindrical bodies, wherein a CO shift catalyst layer and a CO removal catalyst layer are disposed in a gap between the second and third cylindrical bodies, the CO shift catalyst layer being formed in a gap with the direction of flow reversing at one axial end of the reforming catalyst layer and through a heat recovery layer of predetermined length. According to this reforming unit, without internally disposing a heat insulation layer, a cooling mechanism or the like, the reforming catalyst layer, CO shift catalyst layer, and CO removal catalyst layer can be integrated, achieving various useful effects, including size and weight reductions and the shortening of startup time.
摘要翻译： 圆柱形蒸汽重整单元包括多个圆柱体，其包括第一圆筒体，第二圆柱体和以同心间隔开设置的连续增加直径的第三圆柱体，设置在第一圆柱体内并与其同心的辐射圆筒， 设置在辐射筒的径向中心部分中的燃烧器，以及填充在第一和第二圆筒体之间的间隙中的重整催化剂的重整催化剂层，其中CO转移催化剂层和CO去除催化剂层设置在 在第二和第三圆柱体之间的间隙，CO变换催化剂层与在重整催化剂层的一个轴向端部处的流动反向的空间方向形成并且通过预定长度的热回收层形成。 根据该重整单元，在内部不设置绝热层，冷却机构等的情况下，可以一体化重整催化剂层，CO变换催化剂层和CO除去催化剂层，实现各种有用效果，包括尺寸和重量减少 并缩短启动时间。
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9.发明授权
公开(公告)号：US5302987A
公开(公告)日：1994-04-12
申请号：US875039
申请日：1992-04-28
申请人： Yuzuru Kanemori , Hiroshi Fujiki , Toshiaki Fujihara , Akihiko Imaya , Hiroaki Kato , Mikio Katayama , Takayoshi Nagayasu
发明人： Yuzuru Kanemori , Hiroshi Fujiki , Toshiaki Fujihara , Akihiko Imaya , Hiroaki Kato , Mikio Katayama , Takayoshi Nagayasu
IPC分类号： G02F1/1362 , G02F1/1368 , G02F1/1343
CPC分类号： G02F1/1368 , G02F1/13624 , G02F2001/136268
摘要： An active matrix substrate has an insulating substrate, a plurality of signal lines and a plurality of scanning lines arranged in a matrix on the insulating substrate and defining a matrix of areas, each area including a pixel electrode and a switching device. The switching device has a connecting electrode for connecting the switching device to the pixel electrode. The connecting electrode includes a rectangular main portion and an extended portion connected to the main portion, and the main portion has a side which is substantially identical in length to the width of the switching device. The main portion and the extended portion are disposed between the pixel electrode and the insulating substrate.
摘要翻译： 有源矩阵基板具有绝缘基板，多条信号线和在矩阵上布置在绝缘基板上的多条扫描线，并且限定一个区域矩阵，每个区域包括像素电极和开关装置。 开关器件具有用于将开关器件连接到像素电极的连接电极。 连接电极包括矩形主体部分和连接到主体部分的延伸部分，并且主体部分具有与开关装置的宽度大致相同的一侧。 主要部分和延伸部分设置在像素电极和绝缘基板之间。
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公开(公告)号：US5469025A
公开(公告)日：1995-11-21
申请号：US408183
申请日：1995-03-22
申请人： Yuzuru Kanemori , Mikio Katayama , Kiyoshi Nakazawa , Naofumi Kondo , Masaya Okamoto , Hiroaki Kato , Kozo Yano , Katsumi Irie , Kumiko Otsu , Hiroshi Fujiki , Toshiaki Fujihara , Hideji Marumoto , Hidenori Negoto , Kazuyori Mitsumoto
发明人： Yuzuru Kanemori , Mikio Katayama , Kiyoshi Nakazawa , Naofumi Kondo , Masaya Okamoto , Hiroaki Kato , Kozo Yano , Katsumi Irie , Kumiko Otsu , Hiroshi Fujiki , Toshiaki Fujihara , Hideji Marumoto , Hidenori Negoto , Kazuyori Mitsumoto
IPC分类号： G02F1/1362 , H05B37/02
CPC分类号： G02F1/1362 , G02F1/136259 , G02F2001/136268
摘要： An active matrix display device which includes a first and a second insulating substrates, a gate bus an adjacent gate bus, and a source bus arranged on the first substrate, a pixel electrode in a segment enclosed by the gate and the source buses, a switching element connected to the pixel electrode, the gate bus and the source bus, wherein the source bus comprises a projection extending toward the pixel electrode so as to be electrically disconnected therefrom, and the adjacent gate bus comprises a projection extending toward the pixel electrode, the source bus being overlaid on the adjacent gate bus projection with an insulating layer sandwiched therebetween, the adjacent gate bus projection being provided with an electroconductive member at the top thereof with an insulating layer sandwiched therebetween, the electroconductive member being electrically connected to the pixel electrode, and electrically disconnected from the source bus projection.
摘要翻译： 一种有源矩阵显示装置，包括第一绝缘基板和第二绝缘基板，栅极总线和相邻的栅极总线，以及布置在第一基板上的源极总线，由栅极和源极总线包围的段中的像素电极， 连接到像素电极，栅极总线和源极总线的元件，其中源极总线包括朝向像素电极延伸的突起，以便与其电断开，并且相邻的栅极总线包括朝向像素电极延伸的突起， 源极总线覆盖在相邻的栅极总线突起上，绝缘层夹在其间，相邻的栅极总线突起在其顶部设置有导电构件，绝缘层夹在其间，导电构件电连接到像素电极， 并且与源极总线突起电气断开。
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