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公开(公告)号：US10340409B2
公开(公告)日：2019-07-02
申请号：US15612086
申请日：2017-06-02
发明人： Mengyuan Huang , Liangbo Wang , Su Li , Tuo Shi , Pengfei Cai , Wang Chen , Ching-yin Hong , Dong Pan
IPC分类号： H01L31/107 , H01L31/105
摘要： Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.
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公开(公告)号：US20170219783A1
公开(公告)日：2017-08-03
申请号：US15417342
申请日：2017-01-27
发明人： Ning Zhang , Tuo Shi , Yongbo Shao , Tzung-I Su , Dong Pan
CPC分类号： G02B6/4206 , G02B6/2746 , G02B6/30 , G02B6/4208 , G02B6/4209 , G02B6/4212 , G02B6/425 , G02B6/4257 , G02B6/4262 , H01S5/005 , H01S5/0064 , H01S5/02248 , H01S5/0228 , H01S5/02284 , H01S5/12
摘要： A compact and highly efficient coupling structure for coupling between DFB-LD and Si PIC edge coupler with suppressed return loss may include a DFB-LD, a Si PIC comprising at least one input edge coupler and at least one output edge coupler, a silica cover lid disposed on the Si PIC and aligned edge to edge with the Si PIC, a single-mode fiber aligned to the at least one output edge coupler of the Si PIC, a lens disposed between the DFB-LD and the at least one input edge coupler of the Si PIC, and an isolator bonded to a facet of the at least one input edge coupler with a first volume of an index matching fluid. The lens may be configured to minimize a mismatch between an output spot size of the DFB-LD and a spot size of the at least one input edge coupler of the Si PIC.
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3.发明授权Ge/Si avalanche photodiode with integrated heater and fabrication method thereof 有权具有集成加热器的Ge / Si雪崩光电二极管及其制造方法公开(公告)号：US09583664B2
公开(公告)日：2017-02-28
申请号：US15014331
申请日：2016-02-03
发明人： Tuo Shi , Pengfei Cai , Liangbo Wang , Nai Zhang , Wang Chen , Su Li , Ching-yin Hong , Mengyuan Huang , Dong Pan
IPC分类号： H01L31/107 , H01L31/024 , H01L31/028 , H01L31/0232 , H01L31/18 , H01L31/0203 , H01L31/02 , H01L27/14
CPC分类号： H01L31/1075 , H01L27/14 , H01L31/02027 , H01L31/0203 , H01L31/02327 , H01L31/024 , H01L31/028 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.
摘要翻译： 提供具有集成加热器的Ge / Si雪崩光电二极管的新颖结构的各种实施例及其制造方法。 在一个方面，掺杂区域形成在顶部硅层或硅衬底层上，起到电阻的作用。 当环境温度降低到某一点时，将自动触发一个温度控制回路并沿加热器施加适当的偏压，因此Ge / Si雪崩光电二极管的接合区域的温度保持在优化的范围内，以保持 高灵敏度的雪崩光电二极管和低误码率水平。
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4.发明申请Integrated Lens-Array-On-Substrate For Optical Coupling System And Fabrication Method Thereof 审中-公开用于光耦合系统的集成透镜阵列基板及其制造方法公开(公告)号：US20170023739A1
公开(公告)日：2017-01-26
申请号：US15259296
申请日：2016-09-08
发明人： Tuo Shi , Shipeng Yan , Nai Zhang , Dong Pan
CPC分类号： G02B6/32 , G02B5/04 , G02B6/12019 , G02B6/29367 , G02B6/34 , G02B6/4203 , G02B6/4208 , G02B6/4214 , G02B6/4215 , G02B6/4249 , G02B6/4255 , G02B6/4257 , G02B6/4295 , G02B27/1006
摘要： An integrated optical coupling device may include a substrate, a coating layer disposed on the substrate, and a prism disposed on the coating layer. The prism may include a first surface and a second surface. The integrated optical coupling device may also include a first lens disposed on the first surface of the prism, a second lens disposed on the second surface of the prism, and an anti-reflection coating layer disposed on the first lens and the second lens.
摘要翻译： 集成光耦合器件可以包括衬底，设置在衬底上的涂层和设置在涂层上的棱镜。 棱镜可以包括第一表面和第二表面。 集成光耦合装置还可以包括设置在棱镜的第一表面上的第一透镜，设置在棱镜的第二表面上的第二透镜，以及设置在第一透镜和第二透镜上的防反射涂层。
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5.发明申请Integrated Lens-Array-On-Substrate For Optical Coupling System And Fabrication Method Thereof 有权用于光耦合系统的集成透镜阵列基板及其制造方法公开(公告)号：US20160025932A1
公开(公告)日：2016-01-28
申请号：US14807880
申请日：2015-07-23
发明人： Tuo Shi , Shipeng Yan , Nai Zhang , Dong Pan
CPC分类号： G02B6/32 , G02B5/04 , G02B6/12019 , G02B6/29367 , G02B6/34 , G02B6/4203 , G02B6/4208 , G02B6/4214 , G02B6/4215 , G02B6/4249 , G02B6/4255 , G02B6/4257 , G02B6/4295 , G02B27/1006
摘要： An integrated optical coupling device may include a substrate, a coating layer disposed on the substrate, and a prism disposed on the coating layer. The prism may include a first surface and a second surface. The integrated optical coupling device may also include a first lens disposed on the first surface of the prism, a second lens disposed on the second surface of the prism, and an anti-reflection coating layer disposed on the first lens and the second lens.
摘要翻译： 集成光耦合器件可以包括衬底，设置在衬底上的涂层和设置在涂层上的棱镜。 棱镜可以包括第一表面和第二表面。 集成光耦合装置还可以包括设置在棱镜的第一表面上的第一透镜，设置在棱镜的第二表面上的第二透镜，以及设置在第一透镜和第二透镜上的防反射涂层。
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6.发明申请Ge/Si Avalanche Photodiode With Integrated Heater And Fabrication Thereof 有权Ge / Si雪崩光电二极管与集成加热器及其制造公开(公告)号：US20150243800A1
公开(公告)日：2015-08-27
申请号：US14605524
申请日：2015-01-26
发明人： Tuo Shi , Pengfei Cai , Liangbo Wang , Nai Zhang , Wang Chen , Su Li , Ching-yin Hong , Mengyuan Huang , Dong Pan
IPC分类号： H01L31/024 , H01L31/0203 , H01L31/0232 , H01L31/18 , H01L31/107 , H01L31/028
CPC分类号： H01L31/1075 , H01L27/14 , H01L31/02027 , H01L31/0203 , H01L31/02327 , H01L31/024 , H01L31/028 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.
摘要翻译： 提供具有集成加热器的Ge / Si雪崩光电二极管的新颖结构的各种实施例及其制造方法。 在一个方面，掺杂区域形成在顶部硅层或硅衬底层上，起到电阻的作用。 当环境温度降低到某一点时，将自动触发一个温度控制回路并沿加热器施加适当的偏压，因此Ge / Si雪崩光电二极管的接合区域的温度保持在优化的范围内，以保持 高灵敏度的雪崩光电二极管和低误码率水平。
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公开(公告)号：US09000551B2
公开(公告)日：2015-04-07
申请号：US14194002
申请日：2014-02-28
发明人： Mengyuan Huang , Tuo Shi , Pengfei Cai , Dong Pan
IPC分类号： H01L29/66 , H01L31/107 , H01L31/0376
CPC分类号： H01L31/1075 , H01L31/02327
摘要： A GeSi avalanche photodiode (APD includes an anti-reflection structure, a Ge absorption region, and a resonance cavity enhanced (RCE) reflector. The anti-reflection structure includes one or more dielectric layers and a top contact layer which is heavily doped with dopants of a first polarity. The RCE reflector includes: an intrinsic or lightly doped Si multiplication layer, a Si contact layer which is heavily doped with dopants of a second polarity opposite the first polarity, a Si cavity length compensation layer, a buried oxide (BOX) layer, and a Si substrate.
摘要翻译： GeSi雪崩光电二极管（APD包括抗反射结构，Ge吸收区和谐振腔增强（RCE）反射器），抗反射结构包括一个或多个电介质层和重掺杂掺杂剂的顶部接触层 RCE反射器包括：本征或轻掺杂的Si倍增层，重掺杂有与第一极性相反的第二极性的掺杂剂的Si接触层，Si腔长度补偿层，掩埋氧化物（BOX ）层和Si衬底。
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公开(公告)号：US20140239301A1
公开(公告)日：2014-08-28
申请号：US14194002
申请日：2014-02-28
发明人： Mengyuan Huang , Tuo Shi , Pengfei Cai , Dong Pan
IPC分类号： H01L31/107 , H01L31/0376
CPC分类号： H01L31/1075 , H01L31/02327
摘要： A GeSi avalanche photodiode (APD includes an anti-reflection structure, a Ge absorption region, and a resonance cavity enhanced (RCE) reflector. The anti-reflection structure includes one or more dielectric layers and a top contact layer which is heavily doped with dopants of a first polarity. The RCE reflector includes: an intrinsic or lightly doped Si multiplication layer, a Si contact layer which is heavily doped with dopants of a second polarity opposite the first polarity, a Si cavity length compensation layer, a buried oxide (BOX) layer, and a Si substrate.
摘要翻译： GeSi雪崩光电二极管（APD包括抗反射结构，Ge吸收区和谐振腔增强（RCE）反射器），抗反射结构包括一个或多个电介质层和重掺杂掺杂剂的顶部接触层 RCE反射器包括：本征或轻掺杂的Si倍增层，重掺杂有与第一极性相反的第二极性的掺杂剂的Si接触层，Si腔长度补偿层，掩埋氧化物（BOX ）层和Si衬底。
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公开(公告)号：US10578800B2
公开(公告)日：2020-03-03
申请号：US16001581
申请日：2018-06-06
发明人： Tuo Shi , Tzung-I Su , Yongbo Shao , Dong Pan
摘要： Various embodiments of a photonic integrated circuit (PIC) are described herein. A PIC, functioning as a coherent receiver, may include optical components such as an optical coupler, a directional coupler, a beam splitter, a polarizing beam rotator-splitter, a variable optical attenuator, a monitor photodiode, 90-degree hybrid mixer, and a waveguide photodiode. The PIC may also include electrical components such as an electrode, a capacitor, a resistor and a Zener diode.
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10.发明申请公开(公告)号：US20180006429A1
公开(公告)日：2018-01-04
申请号：US15705456
申请日：2017-09-15
发明人： Tuo Shi , Ning Zhang , Yongbo Shao , Tzung-I Su , Dong Pan
CPC分类号： H01S5/02284 , G02B6/30 , G02B6/4206 , G02B6/4207 , H01S5/02208 , H01S5/02288 , H01S5/12
摘要： An optical package for providing efficient coupling between a photonic device and a silicon photonic integrated-circuit chip (Si PIC) edge couplers with low return loss, as well as variations thereof, is described. The optical package may include a photonic device, a Si PIC, a single mode fiber or fiber array assembly, a lens and a spacer. The Si PIC may an input edge coupler and an output edge coupler. The single mode fiber or fiber array assembly may be aligned to the output edge coupler. The lens may be disposed between the photonic device and the input edge coupler, and may be configured to minimize a mismatch between an output spot size of the photonic device and a spot size of the input edge coupler of the Si PIC. The spacer may be bonded to a facet of the input edge coupler with an index matching fluid.
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