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1.发明申请Digital phase locked loop, method for controlling a digital phase locked loop and method for generating an oscillator signal 审中-公开数字锁相环，用于控制数字锁相环的方法和产生振荡信号的方法公开(公告)号：US20070008040A1
公开(公告)日：2007-01-11
申请号：US11477262
申请日：2006-06-29
IPC分类号： H03L7/085
CPC分类号： H03L7/1976 , H03K23/667 , H03L7/091 , H03L7/093 , H03L7/099 , H03L2207/50
摘要： A digital phase locked loop includes a digital phase detector, a downstream digital filter and an oscillator. In addition, a frequency divider resides in a feedback path and has an actuating input for setting a divider ratio, the input of which is connected to the oscillator and the phase detector. The phase locked loop comprises a sigma-delta modulator having a data input for supplying a data word and having an actuating output for supplying a frequency setting word to the actuating input of the frequency divider. The data word is configured such that the sigma-delta modulator generates jitter in the frequency setting word, with the result that the signal which is applied to the feedback input of the phase detector is not constant over a relatively long period of time.
摘要翻译： 数字锁相环包括数字相位检测器，下游数字滤波器和振荡器。 此外，分频器驻留在反馈路径中，并且具有用于设置分频比的致动输入，其输入连接到振荡器和相位检测器。 锁相环包括具有用于提供数据字的数据输入并具有用于向频率分配器的致动输入提供频率设定字的致动输出的Σ-Δ调制器。 数据字被配置为使得Σ-Δ调制器在频率设置字中产生抖动，结果是施加到相位检测器的反馈输入的信号在相对长的时间段内不是恒定的。
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公开(公告)号：US20050104669A1
公开(公告)日：2005-05-19
申请号：US10947847
申请日：2004-09-23
CPC分类号： H03C3/0975 , H03C3/0925 , H03C3/0933 , H03C3/0941
摘要： A two-point modulator arrangement is specified, said arrangement being developed with respect to conventional two-point modulators to the effect that the high-pass coupling-in point of the modulator that comprises a phase locked loop is formed by an expanded loop filter. In accordance with the present principle, the expanded loop filter comprises a coupling-in element, at which the modulation signal is combined with the output signal of a phase comparator. A voltage-controlled oscillator having only one tuning input can thus advantageously be used.
摘要翻译： 指定了两点调制器布置，所述布置相对于传统的两点调制器被展开，使得包括锁相环的调制器的高通耦合点由扩展环路滤波器形成。 根据本原理，扩展环路滤波器包括耦合入元件，其中调制信号与相位比较器的输出信号组合。 因此，可以有利地使用仅具有一个调谐输入的压控振荡器。
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公开(公告)号：US20060114071A1
公开(公告)日：2006-06-01
申请号：US11141591
申请日：2005-05-31
申请人： Stefan Herzinger , Gunter Marzinger
发明人： Stefan Herzinger , Gunter Marzinger
IPC分类号： H03L7/00
CPC分类号： H03C3/0983 , H03C3/0941 , H03C3/095 , H03C3/0966 , H03C3/0975 , H03L7/0891 , H03L7/093 , H03L7/18
摘要： A phase locked loop PLL having a forward path and a feedback path is disclosed. A phase detector drives an oscillator in the forward path of the phase locked loop. The feedback path includes a frequency divider that connects the oscillator output to the phase detector. The phase locked loop further includes an integrator-free loop filter configured to control the oscillator. The integrator-free loop filter enables a reduction in the required PLL bandwidth without reducing the signal quality when the PLL is used as a modulator.
摘要翻译： 公开了具有正向路径和反馈路径的锁相环PLL。 相位检测器驱动锁相环的正向路径中的振荡器。 反馈路径包括将振荡器输出连接到相位检测器的分频器。 锁相环还包括被配置为控制振荡器的无积分器环路滤波器。 无需集成器的环路滤波器可以在PLL用作调制器时降低所需的PLL带宽，而不会降低信号质量。
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4.发明申请Polar modulator and method for determining an amplitude offset in a polar modulator 有权极性调制器和用于确定极性调制器中的幅度偏移的方法公开(公告)号：US20060089111A1
公开(公告)日：2006-04-27
申请号：US11255439
申请日：2005-10-21
CPC分类号： H04L27/361 , H03F3/24
摘要： A polar modulator contains a first input for supplying an amplitude modulation word and a second input for supplying a phase modulation word. The first input is connected to a first signal path, and the second input is connected to a second signal path. The polar modulator contains a converter having a first input which is connected to a first signal path and having a second input which is connected to the second signal path. In this case, the converter is configured to output a radio-frequency signal derived from the phase modulation word and the amplitude modulation word. A feedback path has a level detector connected to the converter and has its output side connected to a correction device. The correction device is designed to output a correction word to the first signal path on the basis of a signal which is output by the level detector.
摘要翻译： 极性调制器包含用于提供幅度调制字的第一输入端和用于提供相位调制字的第二输入端。 第一输入连接到第一信号路径，第二输入连接到第二信号路径。 极性调制器包含具有连接到第一信号路径并且具有连接到第二信号路径的第二输入的第一输入的转换器。 在这种情况下，转换器被配置为输出从相位调制字和幅度调制字导出的射频信号。 反馈路径具有连接到转换器的电平检测器，并且其输出端连接到校正装置。 校正装置被设计为基于由电平检测器输出的信号将校正字输出到第一信号路径。
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公开(公告)号：US20060159197A1
公开(公告)日：2006-07-20
申请号：US11300244
申请日：2005-12-13
IPC分类号： H04L27/20
CPC分类号： H04B1/0458 , H03G3/3047
摘要： The invention relates to a radio transmitter for the transmission of transmission signals. Signals to be transmitted are processed to form transmission signals by the transmission path of the radio transmitter. A first variable amplifier unit and a second variable amplifier unit are arranged in the transmission path. The first variable amplifier unit is arranged in the baseband section of the transmission path, while the second variable amplifier unit is arranged in the radio-frequency section of the transmission path.
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6.发明申请公开(公告)号：US20060082417A1
公开(公告)日：2006-04-20
申请号：US11086039
申请日：2005-03-22
IPC分类号： H03L7/00
CPC分类号： H03L7/1974
摘要： A phase locked loop is disclosed and includes a frequency divider circuit with a settable division ratio in a feedback path. The division ratio is produced using a control circuit which, besides an input for supplying the integer and fractional components for the frequency division ratio which is to be set, includes an input for supplying a phase correction signal. To produce the phase correction signal, the phase locked loop further includes a phase correction apparatus. The phase correction signal preferably contains a signal component with an exponential profile, and is supplied to the control circuit for producing a frequency division ratio for the frequency divider circuit such that it compensates for a phase drift in the output signal from the voltage controlled oscillator in the phase locked loop.
摘要翻译： 公开了一种锁相环，并且包括在反馈路径中具有可设置的分频比的分频器电路。 使用控制电路产生分频比，除了用于提供要被设置的分频比的整数和分数分量的输入外，还包括用于提供相位校正信号的输入。 为了产生相位校正信号，锁相环还包括相位校正装置。 相位校正信号优选地包含具有指数曲线的信号分量，并且被提供给控制电路以产生分频器电路的分频比，使得其补偿来自压控振荡器的输出信号中的相位漂移 锁相环。
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7.发明申请Signal processing device, use of the signal processing device and method for signal processing 有权信号处理装置，使用信号处理装置和信号处理方法公开(公告)号：US20060195284A1
公开(公告)日：2006-08-31
申请号：US11354690
申请日：2006-02-14
申请人： Thorsten Tracht , Gunter Marzinger , Timo Gossmann
发明人： Thorsten Tracht , Gunter Marzinger , Timo Gossmann
CPC分类号： H04B1/0475 , H03F1/3223 , H03F3/24 , H04B2001/0441
摘要： A signal processing device is provided that includes a modulation unit that produces an amplitude element as well as a phase element from components that are applied thereto. A correction device is also provided, in which at least one of the components is supplied and is compared with an ideal nominal value. This is used to produce a correction factor, which is multiplied by the component which has been compared with the nominal value. The correction factor determined is used to correct any offset or distortion of the components produced by analog circuits.
摘要翻译： 提供一种信号处理装置，其包括调制单元，该调制单元从施加到其上的分量产生振幅元件以及相位元件。 还提供一种校正装置，其中提供至少一个部件并将其与理想标称值进行比较。 这用于产生校正因子，该系数乘以与标称值进行比较的分量。 确定的校正因子用于校正由模拟电路产生的分量的任何偏移或失真。
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公开(公告)号：US20060076990A1
公开(公告)日：2006-04-13
申请号：US11211773
申请日：2005-08-25
IPC分类号： H03L7/06
摘要： The invention includes a phase locked loop which has a voltage-controlled oscillator, a phase comparator and a charge pump. The charge pump is coupled to a setting input of the voltage-controlled oscillator via a loop filter. A feedback input of the phase comparator is connected to the output of the voltage-controlled oscillator via a frequency divider, and the phase comparator is designed to output an actuating signal to the charge pump. The loop filter has a first charge store and at least one tunable element that alters a filter characteristic of the loop filter. In addition, there is a trimming circuit which is coupled to the at least one further element in order to alter the filter characteristic of the loop filter and which is designed to compare a time period for a charging operation in a loop filter with a reference time period.
摘要翻译： 本发明包括具有压控振荡器，相位比较器和电荷泵的锁相环。 电荷泵通过环路滤波器耦合到压控振荡器的设置输入。 相位比较器的反馈输入通过分频器连接到压控振荡器的输出，相位比较器被设计为向电荷泵输出启动信号。 环路滤波器具有第一电荷存储器和改变环路滤波器的滤波器特性的至少一个可调元件。 另外，存在一个修整电路，其耦合到至少一个另外的元件，以便改变环路滤波器的滤波器特性，并且被设计为将环路滤波器中的充电操作与参考时间进行比较 期。
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9.发明申请Phase-control circuit arrangement and method for operating said circuit arrangement 失效用于操作所述电路装置的相位控制电路装置和方法公开(公告)号：US20050264368A1
公开(公告)日：2005-12-01
申请号：US11136232
申请日：2005-05-24
CPC分类号： H03L7/10 , H03L2207/05
摘要： A circuit arrangement includes a phase locked loop configured to produce a controlled frequency. The phase locked loop has an actuating input and a control loop output, with it being possible to tap off the frequency at the control loop output. In addition, a frequency meter is provided, which is connected to the control loop output of the phase locked loop. The frequency meter is configured to measure the frequency of the phase locked loop. Finally, a computation unit is provided in order to determine a gradient associated with the phase locked loop and generate a correction value based thereon, wherein the correction value is employed to mitigate a deterioration in the loop bandwidth due to variations in the gradient.
摘要翻译： 电路装置包括被配置为产生受控频率的锁相环。 锁相环具有启动输入和控制回路输出，可以在控制回路输出端分断出频率。 另外，还提供一个频率计，连接到锁相环的控制回路输出。 频率计配置为测量锁相环的频率。 最后，提供计算单元以便确定与锁相环相关联的梯度并基于此生成校正值，其中采用校正值来减轻由于梯度变化引起的环路带宽的恶化。
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