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公开(公告)号：US20110296258A1
公开(公告)日：2011-12-01
申请号：US12788329
申请日：2010-05-27
CPC分类号： G06F11/1048 , G11C13/0004 , H03M13/09 , H03M13/19
摘要： Architecture that implements error correcting pointers (ECPs) with a memory row, which point to the address of failed memory cells, each of which is paired with a replacement cell to be substituted for the failed cell. If two error correcting pointers in the array point to the same cell, a precedence rule dictates the array entry with the higher index (the entry created later) takes precedence. To count the number of error correcting pointers in use, a null pointer address can be employed to indicate that a pointer is inactive, an activation bit can be added, and/or a counter, that represents the number of error correcting pointers that are active. Mechanisms are provided for wear-leveling within the error correction structure, or for pairing this scheme with single-error correcting bits for instances where transient failures may occur. The architecture also employs pointers to correct errors in volatile and non-volatile memories.
摘要翻译： 使用存储器行实现错误校正指针（ECP）的架构，其指向故障存储器单元的地址，每个存储器单元与替换单元配对以替代故障单元。 如果数组中的两个纠错指针指向同一个单元格，则优先级规则将指定具有较高索引的数组条目（稍后创建的条目）优先。 为了对正在使用的纠错指针的数量进行计数，可以采用空指针地址来指示指针不活动，可以添加激活位，和/或计数器，其表示有效的纠错指针的数目 。 提供了用于纠错结构内的磨损均衡的机制，或者用于将该方案与用于可能发生瞬态故障的情况的单错误校正位配对。 该架构还使用指针来纠正易失性和非易失性存储器中的错误。
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公开(公告)号：US08839053B2
公开(公告)日：2014-09-16
申请号：US12788329
申请日：2010-05-27
CPC分类号： G06F11/1048 , G11C13/0004 , H03M13/09 , H03M13/19
摘要： Architecture that implements error correcting pointers (ECPs) with a memory row, which point to the address of failed memory cells, each of which is paired with a replacement cell to be substituted for the failed cell. If two error correcting pointers in the array point to the same cell, a precedence rule dictates the array entry with the higher index (the entry created later) takes precedence. To count the number of error correcting pointers in use, a null pointer address can be employed to indicate that a pointer is inactive, an activation bit can be added, and/or a counter, that represents the number of error correcting pointers that are active. Mechanisms are provided for wear-leveling within the error correction structure, or for pairing this scheme with single-error correcting bits for instances where transient failures may occur. The architecture also employs pointers to correct errors in volatile and non-volatile memories.
摘要翻译： 使用存储器行实现错误校正指针（ECP）的架构，其指向故障存储器单元的地址，每个存储器单元与替换单元配对以替代故障单元。 如果数组中的两个纠错指针指向同一个单元格，则优先级规则将指定具有较高索引的数组条目（稍后创建的条目）优先。 为了对正在使用的纠错指针的数量进行计数，可以采用空指针地址来指示指针不活动，可以添加激活位和/或计数器，其表示活动的纠错指针的数目 。 提供了用于纠错结构内的磨损均衡的机制，或者用于将该方案与用于可能发生瞬态故障的情况的单错误校正位配对。 该架构还使用指针来纠正易失性和非易失性存储器中的错误。
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公开(公告)号：US09092357B2
公开(公告)日：2015-07-28
申请号：US12915025
申请日：2010-10-29
申请人： John D. Davis , Karin Strauss , Douglas C. Burger
发明人： John D. Davis , Karin Strauss , Douglas C. Burger
CPC分类号： G06F12/1027 , G06F12/0292 , G06F12/1009 , G06F2212/1044 , G06F2212/2024 , G11C13/0004 , G11C13/0035 , G11C29/76
摘要： Inoperable phase change memory (PCM) blocks in a PCM device are remapped to one or more operable PCM blocks, e.g. by maintaining an inoperable block table that includes an entry for each inoperable PCM block and an address of a remapped PCM block. Alternatively, the PCM blocks may be remapped by storing the address of the remapped block in the block itself, and setting a remapping bit that indicate the block has been remapped. Where the remapping is performed by a processor, an inoperable block bit may be set in a translation look aside buffer that indicates whether a virtual memory page is associated with an inoperable or remapped PCM block. When a request to access a virtual memory page is received, the processor references the inoperable block bit associated with the virtual memory page to determine whether to check for remapped PCM blocks in the inoperable block table.
摘要翻译： PCM设备中的不可操作的相变存储器（PCM）块被重新映射到一个或多个可操作的PCM块，例如。 通过维护不可操作的块表，其包括每个不可操作的PCM块的条目和重新映射的PCM块的地址。 或者，可以通过将重映射块的地址存储在块本身中来重新映射PCM块，并且设置指示块的重映射比特已被重新映射。 在由处理器执行重新映射的情况下，可以在转换旁边的缓冲器中设置不可操作的块位，缓冲器指示虚拟存储器页是否与不可操作或重新映射的PCM块相关联。 当接收到访问虚拟存储器页面的请求时，处理器引用与虚拟存储器页面相关联的不可操作块位，以确定是否检查不可操作块表中的重新映射的PCM块。
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公开(公告)号：US20120110278A1
公开(公告)日：2012-05-03
申请号：US12915025
申请日：2010-10-29
申请人： John D. Davis , Karin Strauss , Douglas C. Burger
发明人： John D. Davis , Karin Strauss , Douglas C. Burger
IPC分类号： G06F12/00
CPC分类号： G06F12/1027 , G06F12/0292 , G06F12/1009 , G06F2212/1044 , G06F2212/2024 , G11C13/0004 , G11C13/0035 , G11C29/76
摘要： Inoperable phase change memory (PCM) blocks in a PCM device are remapped to one or more operable PCM blocks, e.g. by maintaining an inoperable block table that includes an entry for each inoperable PCM block and an address of a remapped PCM block. Alternatively, the PCM blocks may be remapped by storing the address of the remapped block in the block itself, and setting a remapping bit that indicate the block has been remapped. Where the remapping is performed by a processor, an inoperable block bit may be set in a translation look aside buffer that indicates whether a virtual memory page is associated with an inoperable or remapped PCM block. When a request to access a virtual memory page is received, the processor references the inoperable block bit associated with the virtual memory page to determine whether to check for remapped PCM blocks in the inoperable block table.
摘要翻译： PCM设备中的不可操作的相变存储器（PCM）块被重新映射到一个或多个可操作的PCM块，例如。 通过维护不可操作的块表，其包括每个不可操作的PCM块的条目和重新映射的PCM块的地址。 或者，可以通过将重映射块的地址存储在块本身中来重新映射PCM块，并且设置指示块的重映射比特已被重新映射。 在由处理器执行重新映射的情况下，可以在转换旁边的缓冲器中设置不可操作的块位，缓冲器指示虚拟存储器页是否与不可操作或重新映射的PCM块相关联。 当接收到访问虚拟存储器页面的请求时，处理器引用与虚拟存储器页面相关联的不可操作块位，以确定是否检查不可操作块表中的重新映射的PCM块。
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公开(公告)号：US20130160110A1
公开(公告)日：2013-06-20
申请号：US13328312
申请日：2011-12-16
IPC分类号： G06F21/00
CPC分类号： G06F21/629
摘要： Techniques are described for device locking with activity preservation at a specified level within a multi-level hierarchy of device states. Such locking enables a user to share a device with another user while specifying a particular level of access to the device, such as access to a particular class of applications, a specific application, or a specific task within an application. Determination of the authorized activity may be based on a currently active application, or on the particular user gesture. The level of functionality made available may be based on the number of times a user gesture is repeated. Gestures may include a selection of a hardware or software control on the device, issuance of a voice command, and the like.
摘要翻译： 描述了用于设备锁定的技术，其中活动保留在设备状态的多层次结构内的指定级别。 这种锁定使得用户能够在指定对设备的特定访问级别（例如访问特定类别的应用，特定应用或应用内的特定任务）的同时与另一用户共享设备。 授权活动的确定可以基于当前活动的应用程序，或者基于特定的用户手势。 提供的功能级别可以基于重复用户手势的次数。 手势可以包括对设备上的硬件或软件控制的选择，发出语音命令等。
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公开(公告)号：US08732822B2
公开(公告)日：2014-05-20
申请号：US13328312
申请日：2011-12-16
IPC分类号： G06F21/00
CPC分类号： G06F21/629
摘要： Techniques are described for device locking with activity preservation at a specified level within a multi-level hierarchy of device states. Such locking enables a user to share a device with another user while specifying a particular level of access to the device, such as access to a particular class of applications, a specific application, or a specific task within an application. Determination of the authorized activity may be based on a currently active application, or on the particular user gesture. The level of functionality made available may be based on the number of times a user gesture is repeated. Gestures may include a selection of a hardware or software control on the device, issuance of a voice command, and the like.
摘要翻译： 描述了用于设备锁定的技术，其中活动保留在设备状态的多层次结构内的指定级别。 这种锁定使得用户能够在指定对设备的特定访问级别（例如访问特定类别的应用，特定应用或应用内的特定任务）的同时与另一用户共享设备。 授权活动的确定可以基于当前活动的应用程序，或者基于特定的用户手势。 提供的功能级别可以基于重复用户手势的次数。 手势可以包括对设备上的硬件或软件控制的选择，发出语音命令等。
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公开(公告)号：US08521981B2
公开(公告)日：2013-08-27
申请号：US12970890
申请日：2010-12-16
申请人： Karin Strauss , Douglas Burger , Timothy Sherwood , Gabriel Loh
发明人： Karin Strauss , Douglas Burger , Timothy Sherwood , Gabriel Loh
CPC分类号： G06F12/00 , G06F13/1605 , Y02D10/14
摘要： Techniques are described for controlling availability of memory. As memory write operations are processed, the contents of memory targeted by the write operations are read and compared to the data to be written. The availability of the memory for subsequent write operations is controlled based on the outcomes of the comparing. How many concurrent write operations are being executed may vary according to the comparing. In one implementation, a pool of tokens is maintained based on the comparing. The tokens represent units of power. When write operations require more power, for example when they will alter the values of more cells in PCM memory, they draw (and eventually return) more tokens. The token pool can act as a memory-availability mechanism in that tokens must be obtained for a write operation to be executed. When and how many tokens are reserved or recycled can vary according to implementation.
摘要翻译： 描述了用于控制存储器可用性的技术。 当处理存储器写入操作时，写入操作所针对的存储器的内容被读取并与要写入的数据进行比较。 基于比较的结果来控制用于后续写入操作的存储器的可用性。 正在执行的并发写操作有多少可能会根据比较而有所不同。 在一个实现中，基于比较来维护令牌池。 令牌代表权力单位。 当写操作需要更多的功率时，例如当它们将改变PCM存储器中更多单元的值时，它们绘制（并最终返回）更多的令牌。 令牌池可以充当内存可用性机制，因为必须获得令牌才能执行写操作。 保留或回收的代码何时以及有多少可以根据实现而有所不同。
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公开(公告)号：US08768847B2
公开(公告)日：2014-07-01
申请号：US13530013
申请日：2012-06-21
CPC分类号： H04L63/101 , G06F21/00 , G06Q20/3224 , G06Q20/40 , G06Q2220/12
摘要： The subject disclosure is directed towards a technology by which access to a protected entity's data is controlled by a data brokerage service. The service determines whether a requesting entity has appropriate access rights to requested information, and if so, the service returns a response corresponding to the protected data. In one aspect, the protected data may be location data of a protected entity that is maintained independent of a payment instrument. The location data is used to compute feasibility information as to whether the protected entity is authorized to perform a transaction using the payment instrument.
摘要翻译： 主题公开涉及一种技术，通过该技术，受保护实体的数据的访问由数据经纪服务来控制。 该服务确定请求实体是否对所请求的信息具有适当的访问权限，如果是，则服务返回与受保护数据相对应的响应。 在一个方面，受保护的数据可以是被保持的独立于支付工具的受保护实体的位置数据。 位置数据用于计算关于受保护实体是否被授权使用支付工具执行交易的可行性信息。
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公开(公告)号：US20110040915A1
公开(公告)日：2011-02-17
申请号：US12633034
申请日：2009-12-08
申请人： Karin Strauss , Jaewoong Chung
发明人： Karin Strauss , Jaewoong Chung
IPC分类号： G06F13/24
CPC分类号： G06F13/26 , G06F9/4818 , G06F13/4022
摘要： A method includes delivering a user-level interrupt message indicative of a user-level interrupt to one or more recipients according to a user-level interrupt delivery configuration selected from a plurality of user-level interrupt delivery configurations. The one or more recipients correspond to one or more application threads executing on one or more processor cores of a plurality of processor cores in a multi-core system. A method includes generating an indicator of a user-level interrupt being undeliverable to one or more intended recipients of a user-level interrupt message according to a failed delivery notification mode configuration. The user-level interrupt may be issued by an application thread executing on a first processor core of a plurality of processor cores in a multi-core system.
摘要翻译： 一种方法包括根据从多个用户级中断传递配置中选择的用户级中断传送配置向一个或多个接收者传递指示用户级中断的用户级中断消息。 一个或多个接收者对应于在多核系统中的多个处理器核的一个或多个处理器核上执行的一个或多个应用线程。 一种方法包括根据失败的递送通知模式配置，生成用户级别中断的指示符，该用户级别中断无法传送给用户级中断消息的一个或多个预期接收者。 用户级中断可以由在多核系统中的多个处理器核的第一处理器核上执行的应用程序线程发出。
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公开(公告)号：US07437520B2
公开(公告)日：2008-10-14
申请号：US11178924
申请日：2005-07-11
申请人： Xiaowei Shen , Karin Strauss
发明人： Xiaowei Shen , Karin Strauss
IPC分类号： G06F12/00
CPC分类号： G06F12/0831 , G06F12/082 , G06F2212/507
摘要： In a network-based cache-coherent multiprocessor system, when a node receives a cache request, the node can perform an intra-node cache snoop operation and forward the cache request to a subsequent node in the network. A snoop-and-forward prediction mechanism can be used to predict whether lazy forwarding or eager forwarding is used in processing the incoming cache request. With lazy forwarding, the node cannot forward the cache request to the subsequent node until the corresponding intra-node cache snoop operation is completed. With eager forwarding, the node can forward the cache request to the subsequent node immediately, before the corresponding intra-node cache snoop operation is completed. Furthermore, the snoop-and-forward prediction mechanism can be enhanced seamlessly with an appropriate snoop filter to avoid unnecessary intra-node cache snoop operations.
摘要翻译： 在基于网络的高速缓存相关多处理器系统中，当节点接收到高速缓存请求时，节点可以执行节点内缓存侦听操作，并将缓存请求转发到网络中的后续节点。 可以使用侦听和转发预测机制来预测在处理传入缓存请求中是否使用惰性转发或热切换转发。 使用惰性转发，节点不能将缓存请求转发到后续节点，直到对应的节点内缓存侦听操作完成。 通过急切转发，节点可以在对应的节点内高速缓存监听操作完成之前立即将高速缓存请求转发到后续节点。 此外，可以与适当的窥探过滤器无缝地增强窥探和转发预测机制，以避免不必要的节点内缓存侦听操作。
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