CONTROL METHOD OF NONVOLATILE MEMORY DEVICE

    公开(公告)号:US20130007353A1

    公开(公告)日:2013-01-03

    申请号:US13607038

    申请日:2012-09-07

    IPC分类号: G06F12/02

    摘要: According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.

    NONVOLATILE MEMORY DEVICE, PROGRAMMING METHOD THEREOF AND MEMORY SYSTEM INCLUDING THE SAME
    5.
    发明申请
    NONVOLATILE MEMORY DEVICE, PROGRAMMING METHOD THEREOF AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开
    非易失性存储器件,其编程方法和包括其的存储器系统

    公开(公告)号:US20140029344A1

    公开(公告)日:2014-01-30

    申请号:US14043256

    申请日:2013-10-01

    IPC分类号: G11C16/10

    摘要: Provided is a programming method of a nonvolatile memory device. The nonvolatile memory device includes a substrate and a plurality of memory cells which are stacked in the direction perpendicular to the substrate. The programming method applies a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applies a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited, applies a third voltage to a selected string selection line connected to at least two memory strings in same row, applies a fourth voltage to an unselected string selection line connected to at least two memory strings in same row, and applies a program operation voltage to a plurality of word lines, each word line connected to each corresponding memory cell in the memory string, wherein the first to third voltages are positive voltages.

    摘要翻译: 提供了一种非易失性存储器件的编程方法。 非易失性存储器件包括基板和沿垂直于基板的方向堆叠的多个存储单元。 编程方法将第一电压施加到连接到包括要编程的多个存储器单元的存储单元的同一列中的至少两个存储器串的选定位线,将第二电压施加到连接至少两个的未选定位线 包含要被编程禁止的多个存储单元的存储单元的同一列中的存储器串向同一行中连接到至少两个存储器串的所选择的串选择线施加第三电压,将第四电压施加到未选择的串 选择线连接到同一行中的至少两个存储器串,并且将编程操作电压施加到多个字线,每个字线连接到存储器串中的每个对应的存储单元,其中第一至第三电压是正电压。

    NONVOLATILE MEMORY DEVICE, ERASING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME
    6.
    发明申请
    NONVOLATILE MEMORY DEVICE, ERASING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME 有权
    非易失性存储器件,其擦除方法和包括其的存储器系统

    公开(公告)号:US20130329500A1

    公开(公告)日:2013-12-12

    申请号:US13967455

    申请日:2013-08-15

    申请人: Jinman HAN Doogon KIM

    发明人: Jinman HAN Doogon KIM

    IPC分类号: G11C16/14 G11C16/08

    摘要: Provided is an erasing method of a nonvolatile memory device. The erasing method applies a word line erase voltage to a plurality of word lines connected to the memory cells respectively, applies a specific voltage to a ground selection line connected to the ground selection transistor, applies an erase voltage to a substrate in which the memory string formed during the step applying the specific voltage to the ground selection line, and floats the ground selection line in response to a voltage change of the substrate.

    摘要翻译: 提供了一种非易失性存储器件的擦除方法。 擦除方法将字线擦除电压分别施加到连接到存储器单元的多个字线,向连接到接地选择晶体管的接地选择线施加特定电压,将擦除电压施加到其中存储器串 在施加特定电压到地选择线的步骤期间形成,并且响应于衬底的电压变化漂浮地选择线。

    NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE HAVING THE SAME AND OPERATION METHOD THEREOF
    7.
    发明申请
    NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE HAVING THE SAME AND OPERATION METHOD THEREOF 有权
    非易失存储器件及其存储器件及其操作方法

    公开(公告)号:US20150270008A1

    公开(公告)日:2015-09-24

    申请号:US14664125

    申请日:2015-03-20

    IPC分类号: G11C16/34 G11C16/24 G06F12/02

    摘要: According to example embodiments, a method of operating a storage device includes reading a process capability index using a memory controller, adjusting at least one operation condition based on the process capability index, and operating one of at least one nonvolatile memory device according to the at least one operation condition adjusted. The process capability index indicates how a structure associated with a memory cell to be operated deviates from a target shape.

    摘要翻译: 根据示例性实施例,一种操作存储设备的方法包括使用存储器控制器读取过程能力指数,基于过程能力指数来调整至少一个操作条件,以及根据at处理至少一个非易失性存储器设备 调整至少一个操作条件。 过程能力指数指示与要操作的存储器单元相关联的结构如何偏离目标形状。

    NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM INCORPORATING SAME, AND METHOD OF OPERATING SAME
    8.
    发明申请
    NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM INCORPORATING SAME, AND METHOD OF OPERATING SAME 有权
    非易失性存储器件,与其同时存储的存储器系统及其操作方法

    公开(公告)号:US20110051514A1

    公开(公告)日:2011-03-03

    申请号:US12820435

    申请日:2010-06-22

    IPC分类号: G11C16/06

    摘要: A nonvolatile memory device performs a program operation comprising applying a program pulse to selected memory cells, detecting a number of fail bits among the selected memory cells, the fail bits comprising failed program bits and disturbed inhibit bits, and determining a program completion status of the program operation based on the number of detected fail bits.

    摘要翻译: 非易失性存储器件执行程序操作,包括将程序脉冲施加到所选择的存储器单元,检测所选存储单元中的故障位数,失败位包括失败的程序位和受干扰的禁止位,以及确定程序完成状态 基于检测到的故障位的数量进行编程操作。

    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME
    10.
    发明申请
    NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME 审中-公开
    非易失性存储器件,其操作方法和包括其的存储器系统

    公开(公告)号:US20150302927A1

    公开(公告)日:2015-10-22

    申请号:US14788109

    申请日:2015-06-30

    IPC分类号: G11C16/16

    摘要: Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.

    摘要翻译: 非易失性存储器件,其操作方法和包括该非易失性存储器件的存储器系统。 在操作方法中,连接到位线的第一串的接地选择线可以浮置。 可以将擦除禁止电压施加到连接到位线的第二串的接地选择线。 可以将擦除操作电压施加到第一和第二串。