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    Semiconductor device applied to composite insulative film manufacturing method thereof
    5.
    发明授权
    Semiconductor device applied to composite insulative film manufacturing method thereof 失效
    半导体装置应用于复合绝缘膜的制造方法

    公开(公告)号：US06171977B2

    公开(公告)日：2001-01-09

    申请号：US08777098

    申请日：1996-12-30

    申请人： Yoshio Kasai ,  Takashi Suzuki ,  Takanori Tsuda ,  Yuuichi Mikata ,  Hiroshi Akahori ,  Akihito Yamamoto

    发明人： Yoshio Kasai ,  Takashi Suzuki ,  Takanori Tsuda ,  Yuuichi Mikata ,  Hiroshi Akahori ,  Akihito Yamamoto

    IPC分类号： H01L2131

    CPC分类号： H01L29/66181 ,  H01L21/28167 ,  H01L21/3185

    摘要： A semiconductor wafer having an impurity diffusion layer formed in an inner surface of a trench is cleaned. The semiconductor wafer is inserted into a furnace, and NH3 gas is introduced into the furnace in the low-pressure condition to create an atmosphere in which the temperature is set at 800° C. to 1200° C. and the partial pressures of H2O and O2 are set at 1×10−4 Torr or less. A natural oxide film formed on the inner surface of the trench is removed, and substantially at the same time, a thermal nitride film is formed on the impurity diffusion layer. Then, a CVD silicon nitride film is formed on the thermal nitride film without exposing the thermal nitride film to the outside air in the same furnace. Next, a silicon oxide film is formed on the CVD nitride film. As a result, a composite insulative film formed of the thermal nitride film, CVD silicon nitride film and silicon oxide film is obtained. Then, an electrode for the composite insulative film is formed in the trench.

    摘要翻译： 清洁在沟槽的内表面形成有杂质扩散层的半导体晶片。 将半导体晶片插入炉中，并将NH 3气体在低压条件下引入炉中以产生温度设定在800℃至1200℃的气氛，并且将H 2 O和 O2设定在1×10-4乇或更低。 去除形成在沟槽内表面上的自然氧化膜，并且基本上同时在杂质扩散层上形成氮化氮膜。 然后，在氮化硅膜上形成CVD氮化硅膜，而不会在同一炉内将氮化氮膜暴露于外部空气。 接着，在CVD氮化膜上形成氧化硅膜。 结果，得到由氮化物膜，CVD氮化硅膜和氧化硅膜形成的复合绝缘膜。 然后，在沟槽中形成用于复合绝缘膜的电极。

    Semiconductor device applied to composite insulative film and manufacturing method thereof
    6.
    发明授权
    Semiconductor device applied to composite insulative film and manufacturing method thereof 失效
    具有氮化物膜的半导体器件

    公开(公告)号：US5838056A

    公开(公告)日：1998-11-17

    申请号：US777100

    申请日：1996-12-30

    申请人： Yoshio Kasai ,  Takashi Suzuki ,  Takanori Tsuda ,  Yuuichi Mikata ,  Hiroshi Akahori ,  Akihito Yamamoto

    发明人： Yoshio Kasai ,  Takashi Suzuki ,  Takanori Tsuda ,  Yuuichi Mikata ,  Hiroshi Akahori ,  Akihito Yamamoto

    IPC分类号： H01L27/04 ,  H01L21/28 ,  H01L21/318 ,  H01L21/334 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L23/58

    CPC分类号： H01L29/66181 ,  H01L21/28167 ,  H01L21/3185

    摘要： A semiconductor wafer having an impurity diffusion layer formed in an inner surface of a trench is cleaned. The semiconductor wafer is inserted into a furnace, and NH.sub.3 gas is introduced into the furnace in the low-pressure condition to create an atmosphere in which the temperature is set at 800.degree. C. to 1200.degree. C. and the partial pressures of H.sub.2 O and O.sub.2 are set at 1.times.10.sup.-4 Torr or less. A natural oxide film formed on the inner surface of the trench is removed, and substantially at the same time, a thermal nitride film is formed on the impurity diffusion layer. Then, a CVD silicon nitride film is formed on the thermal nitride film without exposing the thermal nitride film to the outside air in the same furnace. Next, a silicon oxide film is formed on the CVD nitride film. As a result, a composite insulative film formed of the thermal nitride film, CVD silicon nitride film and silicon oxide film is obtained. Then, an electrode for the composite insulative film is formed in the trench.

    摘要翻译： 清洁在沟槽的内表面形成有杂质扩散层的半导体晶片。 将半导体晶片插入炉中，并将NH 3气体在低压条件下引入炉中以产生温度设定在800℃至1200℃的气氛，并且将H 2 O和 O2设定在1×10-4乇或更低。 去除形成在沟槽内表面上的自然氧化膜，并且基本上同时在杂质扩散层上形成氮化氮膜。 然后，在氮化硅膜上形成CVD氮化硅膜，而不会在同一炉内将氮化氮膜暴露于外部空气。 接着，在CVD氮化膜上形成氧化硅膜。 结果，得到由氮化物膜，CVD氮化硅膜和氧化硅膜形成的复合绝缘膜。 然后，在沟槽中形成用于复合绝缘膜的电极。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20120018780A1

    公开(公告)日：2012-01-26

    申请号：US13075665

    申请日：2011-03-30

    申请人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

    发明人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

    IPC分类号： H01L29/772 ,  H01L21/28

    CPC分类号： H01L27/11521

    摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided via a gate insulating film above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a protection film covering the side face of the gate electrode. The method can include etching the semiconductor substrate using the gate electrode as a mask to form the isolation groove. The side face of the gate electrode is covered with the protection film. The method can include forming a first insulating film by oxidizing a surface of the isolation groove to fill a bottom portion of the isolation groove. In addition, the method can include forming a second insulating film on the first insulating film to fill an upper portion of the isolation groove including the side face of the gate electrode.

    摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 作为设置在相邻栅电极之间的隔离槽的内壁的一部分，包括平行于通过半导体基板上方的栅极绝缘膜设置的多个栅电极的沟道方向的侧面。 该方法可以包括形成覆盖栅电极的侧面的保护膜。 该方法可以包括使用栅电极作为掩模来蚀刻半导体衬底以形成隔离槽。 栅电极的侧面被保护膜覆盖。 该方法可以包括通过氧化隔离槽的表面来填充隔离槽的底部来形成第一绝缘膜。 此外，该方法可以包括在第一绝缘膜上形成第二绝缘膜以填充包括栅电极的侧面的隔离槽的上部。

    Nonvolatile semiconductor memory and method of manufacturing the same
    8.
    发明申请
    Nonvolatile semiconductor memory and method of manufacturing the same 有权
    非易失性半导体存储器及其制造方法

    公开(公告)号：US20110020995A1

    公开(公告)日：2011-01-27

    申请号：US12923646

    申请日：2010-09-30

    申请人： Hiroshi Akahori ,  Wakako Takeuchi

    发明人： Hiroshi Akahori ,  Wakako Takeuchi

    IPC分类号： H01L21/22

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

    摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.

    摘要翻译： 非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜， 形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

    Nonvolatile semiconductor memory device and method of manufacturing the same
    9.
    发明授权
    Nonvolatile semiconductor memory device and method of manufacturing the same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US07821056B2

    公开(公告)日：2010-10-26

    申请号：US11902290

    申请日：2007-09-20

    申请人： Hiroshi Akahori ,  Wakako Takeuchi

    发明人： Hiroshi Akahori ,  Wakako Takeuchi

    IPC分类号： H01L29/76

    CPC分类号： H01L21/32134 ,  H01L21/32115 ,  H01L27/115 ,  H01L27/11521

    摘要： A nonvolatile semiconductor memory device includes an array of nonvolatile memory cell transistors, each of which is configured such that a tunnel insulation film, a floating gate electrode, a floating gate insulation film and a control gate electrode are stacked on a surface of a semiconductor substrate. A mean roughness of an interface between a polysilicon, of which the floating gate electrode is formed, and the floating gate insulation film is 1.5 nm or less.

    摘要翻译： 非易失性半导体存储器件包括非易失性存储单元晶体管阵列，每个非易失性存储单元晶体管被配置为使得隧道绝缘膜，浮栅电极，浮栅绝缘膜和控制栅电极堆叠在半导体衬底的表面上 。 形成浮栅的多晶硅与浮栅绝缘膜之间的界面的平均粗糙度为1.5nm以下。

    Manufacturing method of a nonvolatile semiconductor memory device
    10.
    发明授权
    Manufacturing method of a nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件的制造方法

    公开(公告)号：US07651914B2

    公开(公告)日：2010-01-26

    申请号：US12176559

    申请日：2008-07-21

    申请人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

    发明人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

    IPC分类号： H01L21/336 ,  H01L21/3205 ,  H01L21/28

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

    摘要： A manufacturing method of a nonvolatile semiconductor memory device including: providing a first insulating film and a silicon film on a semiconductor substrate; providing a fifth insulating film containing silicon and oxygen on the silicon film; providing a second insulating film containing silicon and nitrogen on the fifth insulating film; providing a third insulating film on the second insulating film, the third insulating film is composed of a single-layer insulating film containing oxygen or multiple-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, and relative dielectric constant of the single-layer insulating film and the stacked insulating film being larger than relative dielectric constant of a silicon oxide film; providing a fourth insulating film containing silicon and nitrogen on the third insulating film; and providing a control gate above the fourth insulating film.

    摘要翻译： 一种非易失性半导体存储器件的制造方法，包括：在半导体衬底上提供第一绝缘膜和硅膜; 在硅膜上提供含有硅和氧的第五绝缘膜; 在第五绝缘膜上提供含有硅和氮的第二绝缘膜; 在所述第二绝缘膜上提供第三绝缘膜，所述第三绝缘膜由包含氧或多层堆叠绝缘膜的单层绝缘膜组成，所述单层绝缘膜至少其顶层和底层上的膜含有氧，并且相对 单层绝缘膜和叠层绝缘膜的介电常数大于氧化硅膜的相对介电常数; 在所述第三绝缘膜上提供含有硅和氮的第四绝缘膜; 以及在所述第四绝缘膜上方设置控制栅极。