公开(公告)号：US4705554A

公开(公告)日：1987-11-10

申请号：US930451

申请日：1986-11-14

申请人： Susumu Matsumoto ,  Shigeru Suzuki ,  Hisao Watanabe ,  Hiroshi Hanabe

发明人： Susumu Matsumoto ,  Shigeru Suzuki ,  Hisao Watanabe ,  Hiroshi Hanabe

IPC分类号： A01N47/30 ,  C07D307/79 ,  C07D307/86

CPC分类号： C07D307/79 ,  A01N47/30 ,  C07D307/86

摘要： A benzofuranyloxyphenylurea derivative having the formula: ##STR1## wherein X is a halogen atom or a trifluoromethyl group, n is an integer of from 0 to 2, Y is a hydrogen atom, a halogen atom or a trifluoromethyl group, R.sup.1 is a lower alkyl group, and R.sup.2 is a lower alkyl group, a lower alkenyl group, a lower alkynyl group or a lower alkoxy group. The compounds are useful as herbicides.

摘要翻译： 具有下式的苯并呋喃基氧基苯基脲衍生物：其中X是卤素原子或三氟甲基，n是0-2的整数，Y是氢原子，卤素原子或三氟甲基，R 1是 低级烷基，R2为低级烷基，低级烯基，低级炔基或低级烷氧基。 该化合物可用作除草剂。

公开(公告)号：US4959092A

公开(公告)日：1990-09-25

申请号：US198287

申请日：1988-05-25

申请人： Hiroki Ohta ,  Katsutoshi Sato ,  Susumu Matsumoto ,  Kazuo Ishii ,  Yumiko Miura ,  Hisao Watanabe ,  Seiichi Suzuki ,  Yoichiro Umeki ,  Hiroshi Hanabe

发明人： Hiroki Ohta ,  Katsutoshi Sato ,  Susumu Matsumoto ,  Kazuo Ishii ,  Yumiko Miura ,  Hisao Watanabe ,  Seiichi Suzuki ,  Yoichiro Umeki ,  Hiroshi Hanabe

IPC分类号： A01N47/30 ,  A01N47/36 ,  C07D307/79 ,  C07D311/58 ,  C07D405/12

CPC分类号： C07D307/79 ,  A01N47/30 ,  A01N47/36 ,  C07D311/58 ,  C07D405/12

摘要： The present invention relates to a substituted phenyl(or pyridyl)urea compound and a herbicidal composition containing the substituted phenyl(or pyridyl)urea compound as an active ingredient.The compound has the formula: ##STR1## wherein A represents an alkylene group; B represents a nitrogen atom or CH; R represents a hydrogen atom, a lower alkyl group or a lower alkoxy group;R.sup.1, R.sup.2, R.sup.3 and R.sup.4 independently represent a hydrogen atom or a methyl group; and n is 0 or 1.

公开(公告)号：US4722934A

公开(公告)日：1988-02-02

申请号：US026198

申请日：1987-03-16

申请人： Susumu Matsumoto ,  Shigeru Suzuki ,  Hiroki Ohta ,  Yoshiaki Higashino ,  Toshiki Fukuchi

发明人： Susumu Matsumoto ,  Shigeru Suzuki ,  Hiroki Ohta ,  Yoshiaki Higashino ,  Toshiki Fukuchi

IPC分类号： A01N43/82 ,  A01N43/824 ,  C07D285/12 ,  C07D285/125 ,  C07D285/13 ,  C07D285/135 ,  C07D417/12

CPC分类号： C07D285/12 ,  A01N43/82 ,  C07D285/125 ,  C07D285/13 ,  C07D285/135 ,  C07D417/12

摘要： The present invention relates to a thiadiazole derivative of the following general formula (I) and an insecticidal and miticidal composition containing the same as an active ingredient: ##STR1## wherein A represents a group of the formula ##STR2## R.sup.1 and R.sup.2 independently represent a hydrogen atom, a halogen atom, a lower alkyl group, a trifluoromethyl group, a cyano group or a nitro group or jointly represent a methylenedioxy group, R.sup.3 represents a hydrogen atom or a lower alkyl group, R.sup.4 represents a lower alkyl group, a lower alkoxy group, a lower alkylthio group, a monoalkylamino group having a lower alkyl group or a dialkylamino group having lower alkyl group, and n is an integer of from 1 through 3.

公开(公告)号：US20130217915A1

公开(公告)日：2013-08-22

申请号：US13882265

申请日：2011-10-27

申请人： Yuta Nakazawa ,  Susumu Matsumoto ,  Tomoaki Kobayashi ,  Tatsuhiko Kurakami

发明人： Yuta Nakazawa ,  Susumu Matsumoto ,  Tomoaki Kobayashi ,  Tatsuhiko Kurakami

IPC分类号： C07C51/16

CPC分类号： C07C51/16 ,  B01J23/002 ,  B01J23/8877 ,  B01J27/199 ,  B01J35/0006 ,  B01J35/04 ,  B01J37/0036 ,  B01J37/0045 ,  B01J37/0244 ,  B01J2523/00 ,  C07C51/235 ,  C07C57/04 ,  B01J2523/17 ,  B01J2523/53 ,  B01J2523/55 ,  B01J2523/68

摘要： The present invention relates to a method for producing acrylic acid through vapor-phase contact oxidation of acrolein, wherein a reactor tube is divided into at least two catalyst layers, and catalysts having a higher activity are charged in the reactor tube sequentially toward an outlet port side from a material source gas inlet port side for a reaction therein to give acrylic acid, and wherein a catalyst activity-controlling method is a method comprising: a step of mixing a molybdenum-containing compound, a vanadium-containing compound, a copper-containing compound and an antimony-containing compound with water, then drying and calcining a resulting mixture, in which a catalytically-active element composition is kept constant but material source compounds are made to vary in type to give composite metal oxides having a different activity.

摘要翻译： 本发明涉及一种通过丙烯醛的气相接触氧化制备丙烯酸的方法，其中将反应器管分成至少两个催化剂层，并且具有较高活性的催化剂依次连接到反应器管的出口 一边从材料源气体入口侧进行反应，得到丙烯酸，其中催化剂活性控制方法是一种方法，包括：将含钼化合物，含钒化合物，铜 - 然后干燥和煅烧所得混合物，其中催化活性元素组合物保持恒定，但是使材料源化合物的类型变化，得到具有不同活性的复合金属氧化物。

公开(公告)号：US08378462B2

公开(公告)日：2013-02-19

申请号：US13214759

申请日：2011-08-22

申请人： Susumu Matsumoto

发明人： Susumu Matsumoto

IPC分类号： H01L29/40 ,  H01L23/053 ,  H01L23/12 ,  H01L23/48 ,  H01L23/52 ,  H01L23/02

CPC分类号： H01L21/76898 ,  H01L21/76831 ,  H01L23/481 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor device includes a semiconductor substrate including a first surface serving as an element formation surface, and a second surface opposite to the first surface; a through-via penetrating the semiconductor substrate; an insulating via coating film formed between a sidewall of the through-via and the semiconductor substrate; and an insulating protective film formed on the second surface of the semiconductor substrate. The via coating film and the protective film are different insulating films from each other.

摘要翻译： 半导体器件包括：半导体衬底，包括用作元件形成表面的第一表面和与第一表面相对的第二表面; 穿透半导体衬底的通孔; 形成在贯通孔的侧壁和半导体基板之间的绝缘通路涂膜; 以及形成在半导体衬底的第二表面上的绝缘保护膜。 通孔涂膜和保护膜是彼此不同的绝缘膜。

公开(公告)号：US20070108614A1

公开(公告)日：2007-05-17

申请号：US11620976

申请日：2007-01-08

申请人： Koji Eriguchi ,  Susumu Matsumoto

发明人： Koji Eriguchi ,  Susumu Matsumoto

IPC分类号： H01L23/48

CPC分类号： H01L21/76838

摘要： At least a laminate of a gate insulating film 6 and a gate electrode 7 and an active region 13 are formed on a silicon substrate 1, and an underlying interlayer insulating film 10 is further formed. Then, a conductor 11a connected to the gate electrode 7, and a conductor 11b that is a dummy conductor and is connected to the active region 13 are formed simultaneously on the underlying interlayer insulating film 10. Thereafter, an interlayer insulating film 12 is formed on the underlying interlayer insulating film 10 by a plasma process. At this time, charging current from a plasma 14 is emitted through the conductor 11b, which is a dummy conductor.

摘要翻译： 至少在硅衬底1上形成栅极绝缘膜6和栅电极7以及有源区13的层叠体，并进一步形成下层层间绝缘膜10。 然后，在下面的层间绝缘膜10上同时形成连接到栅电极7的导体11a和作为虚拟导体并连接到有源区13的导体11b。 此后，通过等离子体处理在下层层间绝缘膜10上形成层间绝缘膜12。 此时，来自等离子体14的充电电流通过作为虚拟导体的导体11b发出。

公开(公告)号：USD361213S

公开(公告)日：1995-08-15

申请号：US18170

申请日：1994-01-31

申请人： Katsuhiro Tokutake ,  Susumu Matsumoto

设计人： Katsuhiro Tokutake ,  Susumu Matsumoto

公开(公告)号：US5405800A

公开(公告)日：1995-04-11

申请号：US274048

申请日：1994-07-12

申请人： Hisashi Ogawa ,  Susumu Matsumoto ,  Shin Hashimoto ,  Hiroyuki Umimoto

发明人： Hisashi Ogawa ,  Susumu Matsumoto ,  Shin Hashimoto ,  Hiroyuki Umimoto

IPC分类号： H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10808

摘要： A method of fabricating a semiconductor memory device on a semiconductor substrate is disclosed. A gate electrode that becomes a word line, a bit line, and a charge-storage electrode are formed in a memory cell array region of a semiconductor substrate. A capacitor insulator layer and a plate electrode are formed in that order. Then, a BPSG film is formed in the memory cell array region and in the peripheral circuit region. A resist pattern is formed on the BPSG film, leaving the memory cell array region exposed. Using the resist pattern thus formed as a mask, an etching treatment is applied to remove an upper surface portion of the BPSG film lying within the memory cell array region by a given amount. After the resist pattern is removed, the BPSG film is heated in order that it reflows to planarize.

摘要翻译： 公开了一种在半导体衬底上制造半导体存储器件的方法。 在半导体衬底的存储单元阵列区域中形成成为字线，位线和电荷存储电极的栅电极。 依次形成电容器绝缘体层和平板电极。 然后，在存储单元阵列区域和外围电路区域中形成BPSG膜。 在BPSG膜上形成抗蚀剂图案，使存储单元阵列区域暴露。 使用如此形成的抗蚀剂图案作为掩模，进行蚀刻处理以将存在于存储单元阵列区域内的BPSG膜的上表面部分除去给定量。 在除去抗蚀剂图案之后，加热BPSG膜，使其回流平坦化。

公开(公告)号：US5214296A

公开(公告)日：1993-05-25

申请号：US848840

申请日：1992-03-10

申请人： Yoshiro Nakata ,  Naoto Matsuo ,  Toshiki Yabu ,  Susumu Matsumoto ,  Shozo Okada

发明人： Yoshiro Nakata ,  Naoto Matsuo ,  Toshiki Yabu ,  Susumu Matsumoto ,  Shozo Okada

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/78642 ,  H01L27/10817

摘要： A thin-film semiconductor device having a vertical TFT which includes a gate insulating film formed on a sidewall of a throughhole formed in an insulating layer; a thin-film semiconductor layer formed on the gate insulating film; and a gate electrode formed within the insulating layer. The gate electrode, the gate insulating film, and the thin-film semiconductor layer together form a lateral MOS structure. The thin-film semiconductor layer is connected to a bit line at the bottom of the throughhole and to a storage node of a capacitor formed over the switching transistor.

摘要翻译： 一种具有垂直TFT的薄膜半导体器件，其包括形成在绝缘层中形成的通孔的侧壁上的栅极绝缘膜; 形成在所述栅极绝缘膜上的薄膜半导体层; 以及形成在所述绝缘层内的栅电极。 栅电极，栅极绝缘膜和薄膜半导体层一起形成横向MOS结构。 薄膜半导体层连接到通孔底部的位线和形成在开关晶体管上的电容器的存储节点。

公开(公告)号：USD311934S

公开(公告)日：1990-11-06

申请号：US132538

申请日：1987-12-14

申请人： Takehiko Takahashi ,  Yoshiyasu Ishii ,  Susumu Matsumoto ,  Taira Hanashima

设计人： Takehiko Takahashi ,  Yoshiyasu Ishii ,  Susumu Matsumoto ,  Taira Hanashima