SYSTEM AND METHOD FOR CONTROLLING AT LEAST TWO POWER SEMICONDUCTORS CONNECTED IN PARALLEL
    1.
    发明申请
    SYSTEM AND METHOD FOR CONTROLLING AT LEAST TWO POWER SEMICONDUCTORS CONNECTED IN PARALLEL 有权
    用于控制并联连接的最小二功率半导体的系统和方法

    公开(公告)号:US20120262218A1

    公开(公告)日:2012-10-18

    申请号:US13512041

    申请日:2010-12-01

    IPC分类号: H03K17/06

    摘要: A system includes at least two power semiconductor chips being connected in parallel and including each a gate terminal for switching the power semiconductor chip in a blocking-state by a first gate voltage and for switching the power semiconductor chip in a conducting-state by a second gate voltage. The system includes further a control device adapted for applying the first or the second gate voltage to the gate terminals of the at least two power semiconductor chips. The control device is adapted for applying a third gate voltage to the gate terminal of the at least one remaining power semiconductor chip when a power semiconductor chip fails, and that the third gate voltage is higher than the second gate voltage.

    摘要翻译: 一种系统包括并联连接的至少两个功率半导体芯片,每个功率半导体芯片包括:每个栅极端子,用于通过第一栅极电压将功率半导体芯片以阻塞状态切换,并将功率半导体芯片以导通状态切换第二栅极电压 栅极电压。 该系统还包括适于将第一或第二栅极电压施加到至少两个功率半导体芯片的栅极端子的控制装置。 所述控制装置适于在功率半导体芯片发生故障时向所述至少一个剩余功率半导体芯片的栅极端子施加第三栅极电压,并且所述第三栅极电压高于所述第二栅极电压。

    System and method for controlling at least two power semiconductors connected in parallel
    2.
    发明授权
    System and method for controlling at least two power semiconductors connected in parallel 有权
    用于控制并联连接的至少两个功率半导体的系统和方法

    公开(公告)号:US09000827B2

    公开(公告)日:2015-04-07

    申请号:US13512041

    申请日:2010-12-01

    IPC分类号: H03K17/06 H03K17/12

    摘要: A system includes at least two power semiconductor chips being connected in parallel and including each a gate terminal for switching the power semiconductor chip in a blocking-state by a first gate voltage and for switching the power semiconductor chip in a conducting-state by a second gate voltage. The system includes further a control device adapted for applying the first or the second gate voltage to the gate terminals of the at least two power semiconductor chips. The control device is adapted for applying a third gate voltage to the gate terminal of the at least one remaining power semiconductor chip when a power semiconductor chip fails, and that the third gate voltage is higher than the second gate voltage.

    摘要翻译: 一种系统包括并联连接的至少两个功率半导体芯片,每个功率半导体芯片包括:每个栅极端子,用于通过第一栅极电压将功率半导体芯片以阻塞状态切换,并将功率半导体芯片以导通状态切换第二栅极电压 栅极电压。 该系统还包括适于将第一或第二栅极电压施加到至少两个功率半导体芯片的栅极端子的控制装置。 所述控制装置适于在功率半导体芯片发生故障时向所述至少一个剩余功率半导体芯片的栅极端子施加第三栅极电压,并且所述第三栅极电压高于所述第二栅极电压。

    Electrical conductor
    5.
    发明授权
    Electrical conductor 有权
    电导体

    公开(公告)号:US08410368B2

    公开(公告)日:2013-04-02

    申请号:US12891402

    申请日:2010-09-27

    IPC分类号: H01R4/58

    摘要: An electrical conductor includes a primary electrical contact, at least one secondary electrical contact, and a connection element. The connection element electrically connects the first and the at least one secondary electrical contacts, and includes at least one plate-like region. Each plate-like region includes at least one deflection component with at least one first and at least one second pivot, wherein the first and second pivots of each deflection means are arranged such that each secondary electrical contact is movable relative to the primary electrical contact in a deflection direction, without creation of a shear force.

    摘要翻译: 电导体包括主电接触,至少一个次电接触和连接元件。 连接元件电连接第一和至少一个次级电触点,并且包括至少一个板状区域。 每个板状区域包括具有至少一个第一和至少一个第二枢轴的至少一个偏转部件,其中每个偏转装置的第一和第二枢轴被布置成使得每个次级电接触件可相对于主电接触件移动 偏转方向,而不产生剪切力。