COOLING-TYPE SWITCHING ELEMENT MODULE
    2.
    发明申请
    COOLING-TYPE SWITCHING ELEMENT MODULE 有权
    冷却型开关元件模块

    公开(公告)号:US20140198449A1

    公开(公告)日:2014-07-17

    申请号:US14145451

    申请日:2013-12-31

    Abstract: A cooling type switching element module includes an outer conductor pipe, an inner conductor pipe that transmits electric power in conjunction with the outer conductor pipe, and first and second switching elements. The first switching elements are provided on outer surfaces of the outer conductor pipe, and the second switching elements are provided on outer surfaces of a projecting portion of the inner conductor pipe. A coolant flows within the inner conductor pipe, and outside the outer conductor pipe. The first and second switching elements are cooled from both sides by the coolant flowing within the inner conductor pipe, and by the coolant flowing outside the outer conductor pipe. By employing the above-described structure, it is possible to provide a switching element module having a cooling function, in which improved cooling performance, improved electrical performance, and downsizing are achieved.

    Abstract translation: 冷却型开关元件模块包括外部导体管,与外部导体管一起传输电力的内部导体管,以及第一和第二开关元件。 第一开关元件设置在外导体管的外表面上,第二开关元件设置在内导体管的突出部分的外表面上。 冷却剂在内导管内流动,外导体管外。 第一和第二开关元件由在内部导体管内流动的冷却剂以及流过外部导体管外部的冷却剂从两侧冷却。 通过采用上述结构,可以提供具有冷却功能的开关元件模块,其中实现了改善的冷却性能,改善的电性能和小型化。

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20180108591A1

    公开(公告)日:2018-04-19

    申请号:US15684449

    申请日:2017-08-23

    Inventor: Norimune ORIMOTO

    CPC classification number: H01L23/345 H01L23/3114 H01L23/3672 H01L25/18

    Abstract: A semiconductor device includes a semiconductor module and a cooler. The semiconductor device includes semiconductor element(s) within a molded resin and a heat sink plate exposed on the molded resin. The cooler includes a cooling plate located on the heat sink plate of the semiconductor module via thermal grease. The cooling plate includes a bimetal structure in which two layers having different linear expansion coefficients are laminated. The heat sink plate includes a first facing surface facing the cooling plate and the semiconductor module is configured to thermally expand such that the first facing surface displaces with respect to the cooling plate. The cooling plate includes a second facing surface facing the heat sink plate, and the bimetal structure is configured to thermally expand such that the second facing surface of the cooling plate displaces in a same direction as the first facing surface of the heat sink plate.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

    公开(公告)号:US20200312739A1

    公开(公告)日:2020-10-01

    申请号:US16781378

    申请日:2020-02-04

    Inventor: Norimune ORIMOTO

    Abstract: A semiconductor device may include: a metal plate including a first surface and a second surface opposite to the first surface; two semiconductor chips bonded to the first surface side by side; a thermally anisotropic member provided at the metal plate between the two semiconductor chips; and a cooler provided on the second surface of the metal plate. A thermal conductivity of the thermally anisotropic member in a side-by-side direction of the two semiconductor chips may be lower than a thermal conductivity of the metal plate, and the thermal conductivity of the thermally anisotropic member in in-plane directions perpendicular to the side-by-side direction may be higher than the thermal conductivity of the metal plate.

    SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE 有权
    半导体器件和半导体器件的制造方法

    公开(公告)号:US20160218068A1

    公开(公告)日:2016-07-28

    申请号:US14915466

    申请日:2014-09-04

    Inventor: Norimune ORIMOTO

    Abstract: A semiconductor device, including: an intermediate plate; a semiconductor element connected to one of surfaces of the intermediate plate by a brazing filler metal; a main plate connected to the other one of the surfaces of the intermediate plate by a brazing filler metal; and a resin layer, the intermediate plate having an external region extending to an outer side with respect to a region in which the intermediate plate is connected to the brazing filler metal, a first through-hole extending through the intermediate plate in the external region, the resin layer covering at least the brazing filler metal, the intermediate plate and a surface of the main plate in which the main plate faces the intermediate plate, the resin layer being also arranged inside the first through-hole.

    Abstract translation: 一种半导体器件,包括:中间板; 半导体元件,其通过钎料连接到所述中间板的一个表面; 主板通过钎料连接到中间板的另一个表面; 以及树脂层,所述中间板具有相对于所述中间板与所述钎料连接的区域向外侧延伸的外部区域,在所述外部区域中延伸穿过所述中间板的第一贯通孔, 所述树脂层至少覆盖所述钎料,所述中间板以及所述主板的与所述中间板相对的主面的表面,所述树脂层也配置在所述第一贯通孔的内部。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20160005676A1

    公开(公告)日:2016-01-07

    申请号:US14707708

    申请日:2015-05-08

    Inventor: Norimune ORIMOTO

    Abstract: A semiconductor device 1 includes a thermal radiation member 4; a first semiconductor chip 21 connected to the thermal radiation member 4; a second semiconductor chip 22 connected to the thermal radiation member 4; and sealing resin 93 sealing the first semiconductor chip 21 and the second semiconductor chip 22. The semiconductor device 1 comprises a first thermal diffusion member 31 connected to the thermal radiation member 4; a second thermal diffusion member 32 connected to the thermal radiation member 4; and a cooler 5 configured to cool the first thermal diffusion member 31 and the second thermal diffusion member 32. A space between the first thermal diffusion member 31 and the second thermal diffusion member 32 is positioned to oppose a space between the first semiconductor chip 21 and the second semiconductor chip 22 via the thermal radiation member 4.

    Abstract translation: 半导体器件1包括热辐射部件4; 连接到热辐射部件4的第一半导体芯片21; 连接到热辐射部件4的第二半导体芯片22; 以及密封第一半导体芯片21和第二半导体芯片22的密封树脂93.半导体器件1包括连接到热辐射部件4的第一热扩散部件31; 连接到热辐射构件4的第二热扩散构件32; 以及构造成冷却第一热扩散构件31和第二热扩散构件32的冷却器5.第一热扩散构件31和第二热扩散构件32之间的空间被定位成与第一半导体芯片21和第二热扩散构件32之间的空间相对。 第二半导体芯片22经由热辐射部件4。

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