公开(公告)号：US10121811B1

公开(公告)日：2018-11-06

申请号：US15686916

申请日：2017-08-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC: H01L21/00 ,  H01L27/146

Abstract: Implementations of the disclosure provide a method of fabricating an image sensor device. The method includes forming first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate, directing ions into the exposed first substrate through the first trenches to form first isolation regions in the substrate, removing the first photoresist layer, forming second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch, directing ions into the exposed second surface through the second trenches to form second isolation regions in the substrate, the first and second isolation regions being alternatingly disposed in the substrate, and the first and second isolation regions defining pixel regions therebetween, and removing the second photoresist layer.

公开(公告)号：US20170186808A1

公开(公告)日：2017-06-29

申请号：US15062956

申请日：2016-03-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC: H01L27/146 ,  H01L21/311 ,  G03F7/32 ,  H01L21/266 ,  G03F7/16 ,  H01L21/027 ,  H01L21/768

CPC classification number: H01L27/14683 ,  G03F7/168 ,  G03F7/32 ,  G03F7/38 ,  G03F7/405 ,  H01L21/0273 ,  H01L21/266 ,  H01L21/31144 ,  H01L21/76802 ,  H01L27/14636 ,  H01L27/14643

Abstract: A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

公开(公告)号：US20190027519A1

公开(公告)日：2019-01-24

申请号：US15652508

申请日：2017-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chao Chiu ,  Kai Tzeng ,  Chih-Chien Wang ,  Chun-Wei Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu ,  Cheng-Ta Wu

IPC: H01L27/146 ,  H01L21/761 ,  H01L21/027 ,  H01L21/265 ,  G03F7/09 ,  G03F7/095 ,  G03F7/11

Abstract: Various examples of a technique for forming a pattern for substrate fabrication are disclosed herein. In an example, a method includes receiving a substrate. A patterned resist is formed on the substrate and has a trench defined therein. A dielectric is deposited on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench. A fabrication process is performed on a region of the substrate underlying the trench defined by the dielectric.

公开(公告)号：US10186542B1

公开(公告)日：2019-01-22

申请号：US15652508

申请日：2017-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chao Chiu ,  Kai Tzeng ,  Chih-Chien Wang ,  Chun-Wei Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu ,  Cheng-Ta Wu

IPC: H01L27/00 ,  H01L27/146 ,  H01L21/761 ,  H01L21/027 ,  H01L21/265 ,  G03F7/09 ,  G03F7/095 ,  G03F7/11 ,  G03F7/16 ,  G03F7/20 ,  G03F7/38 ,  G03F7/32

Abstract: Various examples of a technique for forming a pattern for substrate fabrication are disclosed herein. In an example, a method includes receiving a substrate. A patterned resist is formed on the substrate and has a trench defined therein. A dielectric is deposited on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench. A fabrication process is performed on a region of the substrate underlying the trench defined by the dielectric.

公开(公告)号：US20240234481A1

公开(公告)日：2024-07-11

申请号：US18150912

申请日：2023-01-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Shu Yang ,  Chun Yi Wu ,  Kai Tzeng ,  Yuh-Sen Chang ,  Chi-Cheng Chen ,  Chi-Chun Peng

IPC: H01L27/08

CPC classification number: H01L28/10

Abstract: A method of forming a semiconductor device, the method including forming a first insulation layer over a substrate, depositing a first stack of magnetic layers over the first insulation layer, etching the first stack of magnetic layers such that a sidewall of the first stack of magnetic layers forms a stairstep pattern, forming a first photosensitive layer over the first stack of magnetic layers, the first insulation layer, and the substrate, wherein a thickness of the first photosensitive layer above a center of a first step of the stairstep pattern is different from a thickness of the first photosensitive layer above a center of a second step of the stairstep pattern, forming a first conductive feature over the first photosensitive layer, depositing a second insulation layer over the first photosensitive layer and the first conductive feature, and depositing a second magnetic layer over the second insulation layer.

公开(公告)号：US10734436B2

公开(公告)日：2020-08-04

申请号：US16142681

申请日：2018-09-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC: G03F7/38 ,  H01L27/146 ,  G03F7/40 ,  H01L21/768 ,  G03F7/16 ,  G03F7/32 ,  H01L21/027 ,  H01L21/266 ,  H01L21/311

Abstract: A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

公开(公告)号：US11139239B2

公开(公告)日：2021-10-05

申请号：US16589395

申请日：2019-10-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Wen Hsu ,  Jiech-Fun Lu ,  Kai Tzeng ,  Wei-Li Huang

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including an interconnect structure overlying a substrate. The interconnect structure has a plurality of metal layers overlying over the substrate. A first dielectric layer overlies an uppermost surface of the interconnect structure. The first dielectric layer has opposing sidewalls defining a trench. A first magnetic layer is disposed within the trench and conformally extends along the opposing sidewalls. Conductive wires are disposed within the trench and overlie the first magnetic layer. A second magnetic layer overlies the first magnetic layer and the conductive wires. The second magnetic layer laterally extends from over a first sidewall of the opposing sidewalls to a second sidewall of the opposing sidewalls.

公开(公告)号：US20210098371A1

公开(公告)日：2021-04-01

申请号：US16589395

申请日：2019-10-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Wen Hsu ,  Jiech-Fun Lu ,  Kai Tzeng ,  Wei-Li Huang

IPC: H01L23/522 ,  H01L49/02 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including an interconnect structure overlying a substrate. The interconnect structure has a plurality of metal layers overlying over the substrate. A first dielectric layer overlies an uppermost surface of the interconnect structure. The first dielectric layer has opposing sidewalls defining a trench. A first magnetic layer is disposed within the trench and conformally extends along the opposing sidewalls. Conductive wires are disposed within the trench and overlie the first magnetic layer. A second magnetic layer overlies the first magnetic layer and the conductive wires. The second magnetic layer laterally extends from over a first sidewall of the opposing sidewalls to a second sidewall of the opposing sidewalls.

公开(公告)号：US20190027530A1

公开(公告)日：2019-01-24

申请号：US16142681

申请日：2018-09-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC: H01L27/146 ,  H01L21/266 ,  H01L21/768 ,  G03F7/38 ,  H01L21/311 ,  H01L21/027 ,  G03F7/32 ,  G03F7/16 ,  G03F7/40

Abstract: A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

公开(公告)号：US20230290809A1

公开(公告)日：2023-09-14

申请号：US17828844

申请日：2022-05-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mei-Chi Lee ,  Chi-Cheng Chen ,  Wei-Li Huang ,  Kai Tzeng ,  Chun Yi Wu ,  Ming-Da Cheng

IPC: H01L49/02

CPC classification number: H01L28/10

Abstract: A method of forming a semiconductor device includes: forming a passivation layer over a conductive pad that is disposed over a substrate; and forming an inductive component over the passivation layer, including: forming a first insulation layer and a first magnetic layer successively over the passivation layer; forming a first polymer layer over the first magnetic layer; forming a first conductive feature over the first polymer layer; forming a second polymer layer over the first polymer layer and the first conductive feature; patterning the second polymer layer, where after the patterning, a first sidewall of the second polymer layer includes multiple segments, where an extension of a first segment of the multiple segments intersects the second polymer layer; and after patterning the second polymer layer, forming a second insulation layer and a second magnetic layer successively over the second polymer layer.