公开(公告)号：US20210013205A1

公开(公告)日：2021-01-14

申请号：US17035296

申请日：2020-09-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chia-Chun LIAO ,  Chun-Sheng LIANG ,  Shu-Hui WANG ,  Shih-Hsun CHANG ,  Yi-Jen CHEN

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/66

摘要： A semiconductor device manufacturing method includes forming fins in first and second regions defined on a substrate. The fins include first fin, second fin, third fin, and fourth fin. A dielectric layer is formed over fins and a work function adjustment layer is formed over dielectric layer. A hard mask is formed covering third and fourth fins. A first conductive material layer is formed over first fin and not over second fin. A second conductive material layer is formed over first and second fins. A first metal gate electrode fill material is formed over first and second fins. The hard mask covering third and fourth fins is removed. A third conductive material layer is formed over third fin and not over fourth fin. A fourth conductive material layer is formed over third and fourth fins, and a second metal gate electrode fill material is formed over third and fourth fins.

公开(公告)号：US20170229461A1

公开(公告)日：2017-08-10

申请号：US15355717

申请日：2016-11-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Shun-Jang LIAO ,  Chia-Chun LIAO ,  Shu-Hui WANG ,  Shih-Hsun CHANG

IPC分类号： H01L27/092 ,  H01L21/768 ,  H01L21/28 ,  H01L29/49 ,  H01L21/8238

CPC分类号： H01L27/0922 ,  H01L21/28088 ,  H01L21/76897 ,  H01L21/82345 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/4966

摘要： A semiconductor device includes first-type-channel field effect transistors (FETs) including a first first-type-channel FET including a first gate structure and a second first-type-channel FET including a second gate structure. The first first-type-channel FET has a smaller threshold voltage than the second first-type-channel FET. The first gate structure includes a first work function adjustment material (WFM) layer and the second gate structure includes a second WFM layer. At least one of thickness and material of the first and second WFM layers is different from each other.

公开(公告)号：US20220102147A1

公开(公告)日：2022-03-31

申请号：US17549673

申请日：2021-12-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yen-Yu CHEN ,  Yu-Chi LU ,  Chih-Pin TSAO ,  Shih-Hsun CHANG

IPC分类号： H01L21/28 ,  H01L29/49

摘要： A method includes removing a dummy gate to form a gate trench. A gate dielectric layer is deposited over a bottom and sidewalls of the gate trench. A first work function metal layer is deposited over the gate dielectric layer. A dummy layer is deposited over the first work function metal layer. An impurity is introduced into the dummy layer and the first work function metal layer after the dummy layer is deposited. The dummy layer is removed after the impurity is introduced into the dummy layer and the first work function metal layer. The gate trench is filled with a conductive material after the dummy layer is removed.

公开(公告)号：US20190109051A1

公开(公告)日：2019-04-11

申请号：US16196642

申请日：2018-11-20

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Ming-Heng TSAI ,  Chun-Sheng LIANG ,  Pei-Lin WU ,  Yi-Ren CHEN ,  Shih-Hsun CHANG

IPC分类号： H01L21/8238 ,  H01L29/78 ,  H01L29/267 ,  H01L29/24 ,  H01L29/165 ,  H01L29/16 ,  H01L29/161 ,  H01L21/8234 ,  H01L29/08

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The gate stack has a first upper portion and a first lower portion, and the first upper portion is wider than the first lower portion. The semiconductor device structure includes a spacer layer surrounding the gate stack. The spacer layer has a second upper portion and a second lower portion. The second upper portion is thinner than the second lower portion.

公开(公告)号：US20180337181A1

公开(公告)日：2018-11-22

申请号：US16049378

申请日：2018-07-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Shun-Jang LIAO ,  Chia-Chun LIAO ,  Shu-Hui WANG ,  Shih-Hsun CHANG

IPC分类号： H01L27/092 ,  H01L29/49 ,  H01L27/088 ,  H01L21/28 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/768

摘要： A semiconductor device includes first-type-channel field effect transistors (FETs) including a first first-type-channel FET including a first gate structure and a second first-type-channel FET including a second gate structure. The first first-type-channel FET has a smaller threshold voltage than the second first-type-channel FET. The first gate structure includes a first work function adjustment material (WFM) layer and the second gate structure includes a second WFM layer. At least one of thickness and material of the first and second WFM layers is different from each other.

公开(公告)号：US20180108653A1

公开(公告)日：2018-04-19

申请号：US15844593

申请日：2017-12-17

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yi-Jen CHEN ,  Chun-Sheng LIANG ,  Shu-Hui WANG ,  Shih-Hsun CHANG ,  Hsin-Che CHIANG

IPC分类号： H01L27/088 ,  H01L21/02 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51

摘要： A semiconductor structure includes a pair of gate structures and an isolation structure. Each of the gate structures includes a work function metal, a gate, and a barrier layer between the work function metal and the gate. The isolation structure is disposed between the gate structures. The barrier layer covers a sidewall of the isolation structure.

公开(公告)号：US20170352559A1

公开(公告)日：2017-12-07

申请号：US15609199

申请日：2017-05-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Li-Jung LIU ,  Chih-Pin TSAO ,  Chia-Wei SOONG ,  Jyh-Huei CHEN ,  Shu-Hui WANG ,  Shih-Hsun CHANG

IPC分类号： H01L21/67 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/311 ,  H01J37/32

CPC分类号： H01L21/67069 ,  H01J37/32 ,  H01L21/0274 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/67063 ,  H01L23/485 ,  H01L29/7851 ,  H01L2924/12042

摘要： A method of forming a semiconductor device includes forming a fin over a substrate, forming a polysilicon gate structure over the fin, and replacing the polysilicon gate structure with a metal gate structure. Replacing of the polysilicon gate structure includes depositing a work function metal layer over the fin, performing a sublimation process on a non-fluorine based metal precursor to produce a gaseous non-fluorine based metal precursor, and depositing a substantially fluorine-free metal layer over the work function metal layer based on the gaseous non-fluorine based metal precursor. The substantially fluorine-free metal layer includes an amount of fluorine less than about 5 atomic percent. An example benefit includes reduction or elimination of diffusion of fluorine contaminants from a gate metal fill layer into its underlying layers and from conductive layers into diffusion barrier layers and silicide layers of source/drain contact structures and consequently, the reduction of the negative impact of these fluorine contaminants on device performance.

公开(公告)号：US20230109915A1

公开(公告)日：2023-04-13

申请号：US18066203

申请日：2022-12-14

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yen-Yu CHEN ,  Yu-Chi LU ,  Chih-Pin TSAO ,  Shih-Hsun CHANG

IPC分类号： H01L21/28 ,  H01L29/49

摘要： A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.

公开(公告)号：US20200303511A1

公开(公告)日：2020-09-24

申请号：US16889245

申请日：2020-06-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tsung-Han TSAI ,  Jen-Hsiang LU ,  Shih-Hsun CHANG

IPC分类号： H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L29/40 ,  H01L21/02 ,  H01L29/78

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a semiconductor substrate and a gate structure formed across the fin structure. The semiconductor device structure also includes an isolation feature over a semiconductor substrate and below a portion of the gate structure and two spacer elements respectively formed over a first sidewall and a second sidewall of the gate structure. In addition, the first sidewall is opposite to the second sidewall and the two spacer elements have hydrophobic surfaces respectively facing the first sidewall and the second sidewall, and the gate structure includes a gate dielectric layer and a gate electrode layer separating the gate dielectric layer from the hydrophobic surfaces of the two spacer elements.

公开(公告)号：US20200035800A1

公开(公告)日：2020-01-30

申请号：US16048833

申请日：2018-07-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Tsung-Han TSAI ,  Jen-Hsiang LU ,  Shih-Hsun CHANG

IPC分类号： H01L29/423 ,  H01L29/786 ,  H01L29/78 ,  H01L29/40 ,  H01L21/02 ,  H01L29/66

摘要： A method of forming a semiconductor device structure is provided. The method includes forming an isolation feature over a semiconductor substrate. The semiconductor substrate includes a fin structure over the isolation feature. Two opposing spacer elements are formed over the isolation feature and across the fin structure so as to define a gate opening. The gate opening exposes the fin structure and the isolation feature and inner sidewalls of the gate opening have carbon-containing hydrophobic surfaces. A gate structure is formed in the gate opening with the carbon-containing hydrophobic surfaces.