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公开(公告)号:US20230152521A1
公开(公告)日:2023-05-18
申请号:US18094839
申请日:2023-01-09
发明人: Tao-Cheng LIU , Tsai-Hao HUNG , Shih-Chi KUO
IPC分类号: G02B6/136 , G02B6/122 , H01L21/308 , H01L21/306 , G02B5/18
CPC分类号: G02B6/136 , G02B6/1225 , H01L21/3086 , H01L21/30608 , G02B5/1819 , G02B5/1857
摘要: A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
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公开(公告)号:US20210384423A1
公开(公告)日:2021-12-09
申请号:US17405907
申请日:2021-08-18
发明人: Tsai-Hao HUNG , Shih-Chi Kuo
摘要: A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.
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公开(公告)号:US20200075673A1
公开(公告)日:2020-03-05
申请号:US16116308
申请日:2018-08-29
发明人: Chun-Chieh MO , Shih-Chi KUO , Tsai-Hao HUNG
摘要: A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.
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公开(公告)号:US20210351221A1
公开(公告)日:2021-11-11
申请号:US16867873
申请日:2020-05-06
发明人: Tsai-Hao HUNG , Tao-Cheng LIU , Ying-Hsun CHEN
IPC分类号: H01L27/146
摘要: Photonic devices and methods having an increased quantum effect length are provided. In some embodiments, a photonic device includes a substrate having a first surface. A cavity extends into the substrate from the first surface to a second surface. A semiconductor layer is disposed on the second surface in the cavity of the substrate, and a cover layer is disposed on the semiconductor layer. The semiconductor layer is configured to receive incident radiation through the substrate and to totally internally reflect the radiation at an interface between the semiconductor layer and the cover layer.
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公开(公告)号:US20210343883A1
公开(公告)日:2021-11-04
申请号:US16863989
申请日:2020-04-30
发明人: Tao-Cheng LIU , Tsai-Hao HUNG , Ying-Hsun CHEN
IPC分类号: H01L31/02 , H01L31/0232 , H01L31/18
摘要: An integrated circuit includes a photodetector. The photodetector includes a circular optical grating formed in an annular trench in a semiconductor substrate. The circular optical grating includes dielectric fins and photosensitive fins positioned in the annular trench. The circular optical grating is configured to receive incident light and to direct the incident light around the annular trench through the dielectric fins and the photosensitive fins until the light is absorbed by one of the photosensitive fins.
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公开(公告)号:US20200335386A1
公开(公告)日:2020-10-22
申请号:US16559089
申请日:2019-09-03
发明人: Tsai-Hao HUNG , Ping-Cheng KO , Tzu-Yang LIN , Fang-Yu LIU , Cheng-Han WU
IPC分类号: H01L21/687 , H01L21/677 , H01L21/67 , H01L21/66 , H05F1/00
摘要: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.
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公开(公告)号:US20200249397A1
公开(公告)日:2020-08-06
申请号:US16856581
申请日:2020-04-23
发明人: Tao-Cheng LIU , Tsai-Hao HUNG , Shih-Chi KUO
IPC分类号: G02B6/136 , G02B6/122 , H01L21/308 , H01L21/306 , G02B5/18
摘要: A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
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公开(公告)号:US20240204032A1
公开(公告)日:2024-06-20
申请号:US18594922
申请日:2024-03-04
发明人: Shih-Yu LIAO , Tsai-Hao HUNG , Ying-Hsun CHEN
IPC分类号: H01L27/146 , G01J1/44 , H04N25/70
CPC分类号: H01L27/1464 , G01J1/44 , H01L27/14621 , H01L27/14627 , H01L27/14629 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/14685 , H04N25/70 , G01J2001/448
摘要: The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
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公开(公告)号:US20220238591A1
公开(公告)日:2022-07-28
申请号:US17723127
申请日:2022-04-18
发明人: Chun-Wei HSU , Tsai-Hao HUNG , Chung-Yu LIN , Ying-Hsun CHEN
IPC分类号: H01L27/146 , H01L31/18 , H01L31/028 , H01L31/0236 , H01L31/0232
摘要: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
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公开(公告)号:US20210215550A1
公开(公告)日:2021-07-15
申请号:US17216047
申请日:2021-03-29
发明人: Tsai-Hao HUNG , Shih-Chi KUO
摘要: The structure of a micro-electro-mechanical system (MEMS) thermal sensor and a method of fabricating the MEMS thermal sensor are disclosed. A method of fabricating a MEMS thermal sensor includes forming first and second sensing electrodes with first and second electrode fingers, respectively, on a substrate and forming a patterned layer with a rectangular cross-section between a pair of the first electrode fingers. The first and second electrode fingers are formed in an interdigitated configuration and suspended above the substrate. The method further includes modifying the patterned layer to have a curved cross-section between the pair of the first electrode fingers, forming a curved sensing element on the modified patterned layer to couple to the pair of the first electrodes, and removing the modified patterned layer.
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