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1.发明申请公开(公告)号：US20190250522A1
公开(公告)日：2019-08-15
申请号：US16397678
申请日：2019-04-29
Inventor： Jui-Ching WU , Jeng-Horng CHEN , Chia-Chen CHEN , Shu-Hao CHANG , Shang-Chieh CHIEN , Ming-Chin CHIEN , Anthony YEN
CPC classification number: G03F7/70641 , G03F7/70133 , G03F7/70141 , G03F7/7085 , G03F7/70991 , G03F9/7026 , G03F9/7061
Abstract: Systems and methods that include providing for measuring a first topographical height of a substrate at a first coordinate on the substrate and measuring a second topographical height of the substrate at a second coordinate on the substrate are provided. The measured first and second topographical heights may be provided as a wafer map. An exposure process is then performed on the substrate using the wafer map. The exposure process can include using a first focal point when exposing the first coordinate on the substrate and using a second focal plane when exposing the second coordinate on the substrate. The first focal point is determined using the first topographical height and the second focal point is determined using the second topographical height.
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公开(公告)号：US20160172196A1
公开(公告)日：2016-06-16
申请号：US15017808
申请日：2016-02-08
Inventor： Chung-Ju LEE , Chih-Tsung SHIH , Jeng-Horng CHEN , Shinn-Sheng YU , Tsung-Min HUANG , Anthony YEN
IPC: H01L21/033 , H01L21/311 , H01L21/02
CPC classification number: H01L21/0338 , H01L21/0228 , H01L21/0335 , H01L21/0337 , H01L21/31111 , H01L21/31133 , H01L21/31144 , H01L21/76811 , H01L21/76813 , H01L2221/1021
Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A a dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench.
Abstract translation: 公开了制造半导体集成电路（IC）的方法。 在衬底上形成介电层。 在电介质层上形成中间层。 在中间层上形成具有第一开口的第一光致抗蚀剂层，并且在第一光致抗蚀剂层上形成具有第二开口的第二光致抗蚀剂层。 间隔件沿着第一开口和第二开口的侧壁形成。 通过沿着第一开口使用间隔物作为蚀刻掩模，在中间层中形成第一沟槽。 通过沿着第二开口使用间隔物作为蚀刻掩模，在中间层中形成第二沟槽。 第一沟槽和第二沟槽分别作为电介质沟槽的下部和上部延伸到介电层中。
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公开(公告)号：US20160011501A1
公开(公告)日：2016-01-14
申请号：US14327834
申请日：2014-07-10
Inventor： Tao-Min HUANG , Chia-Jen CHEN , Hsin-Chang LEE , Chih-Tsung SHIH , Shinn-Sheng YU , Jeng-Horng CHEN , Anthony YEN
CPC classification number: G03F7/2004 , G03F1/24 , G03F1/36 , G03F1/38 , G03F7/20 , G03F7/7055
Abstract: A photomask having a partial-thickness assist feature and a technique for manufacturing the photomask are disclosed. In an exemplary embodiment, the photomask includes a mask substrate, a reflective structure disposed on the mask substrate, and an absorptive layer formed on the reflective structure. A printing feature region and an assist feature region are defined on the mask. The absorptive layer has a first thickness in the printing feature region and a second thickness in the assist feature region that is different from the first thickness. In some such embodiments, the second thickness is configured such that radiation reflected by the assist feature region does not exceed an exposure threshold of a photoresist of a target.
Abstract translation: 公开了具有局部厚度辅助特征的光掩模和用于制造光掩模的技术。 在示例性实施例中，光掩模包括掩模基板，设置在掩模基板上的反射结构和形成在反射结构上的吸收层。 在掩模上定义打印特征区域和辅助特征区域。 吸收层在印刷特征区域中具有第一厚度，在辅助特征区域中具有与第一厚度不同的第二厚度。 在一些这样的实施例中，第二厚度被配置为使得由辅助特征区域反射的辐射不超过目标的光刻胶的曝光阈值。
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Patent Agency Ranking
公开(公告)号：US20150104736A1
公开(公告)日：2015-04-16
申请号：US14531639
申请日：2014-11-03
Inventor： Pei-Cheng HSU , Chih-Tsung SHIH , Chia-Jen CHEN , Tsiao-Chen WU , Shinn-Sheng YU , Hsin-Chang LEE , Anthony YEN
IPC: G03F1/24 , G03F1/48 , H01L21/033
CPC classification number: G03F1/24 , G03F1/48 , H01L21/0337
Abstract: A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, a second absorption layer deposited inside the border ditch, and where the second absorption layer contacts the capping layer. In some instances, the border ditch crosses the capping layer and partially enters the reflective multilayer.
Abstract translation: 描述了一种反光罩。 掩模包括低热膨胀材料（LTEM）衬底，沉积在LTEM衬底的第一表面上的导电层，沉积在LTEM衬底的第二表面上的反射多层堆叠（ML），沉积在 堆叠的反射ML，沉积在第一盖层上的第一吸收层，主图案和边界沟。 边界沟到达覆盖层，沉积在边界沟内的第二吸收层，第二吸收层与覆盖层接触。 在一些情况下，边界沟穿过覆盖层并部分地进入反射层。
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公开(公告)号：US20170110366A1
公开(公告)日：2017-04-20
申请号：US15394466
申请日：2016-12-29
Inventor： Yen-Cheng LU , Chih-Tsung SHIH , Shinn-Sheng YU , Jeng-Horng CHEN , Anthony YEN
IPC: H01L21/768 , G03F1/22 , H01L21/311 , G03F7/20 , G03F7/095 , G03F7/039
CPC classification number: H01L21/76817 , G03F1/20 , G03F1/22 , G03F1/50 , G03F1/58 , G03F7/039 , G03F7/095 , G03F7/20 , G03F7/2004 , H01L21/0277 , H01L21/0332 , H01L21/3083 , H01L21/31111 , H01L21/31144 , H01L21/76811 , H01L21/76877
Abstract: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern.
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公开(公告)号：US20160377983A1
公开(公告)日：2016-12-29
申请号：US15260953
申请日：2016-09-09
Inventor： Shinn-Sheng YU , Anthony YEN , Yen-Cheng LU
IPC: G03F7/20
CPC classification number: G03F7/70325 , G03F1/24 , G03F7/70033 , G03F7/70091 , G03F7/70125 , G03F7/70191 , G03F7/702 , G03F7/70308 , G03F7/70316 , G03F7/70408 , G21K1/062
Abstract: A process of an extreme ultraviolet lithography is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask, an EUV radiation source and an illuminator. The process also includes exposing the EUV mask by a radiation, originating from the EUV radiation source and directed by the illuminator, with a less-than-three-degree chief ray angle of incidence at the object side (CRAO). The process further includes removing most of the non-diffracted light and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
Abstract translation: 公开了一种极紫外光刻技术。 该方法包括接收极紫外（EUV）掩模，EUV辐射源和照明器。 该方法还包括通过来自EUV辐射源并由照明器引导的辐射暴露EUV掩模，在物体侧具有小于三度的主射线入射角（CRAO）。 该方法还包括去除大部分非衍射光并且通过投影光学盒（POB）收集和引导衍射光和未被去除的非衍射光以暴露靶。
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7.发明申请Extreme Ultraviolet Lithography Process and Mask with Reduced Shadow Effect and Enhanced Intensity 有权极紫外光刻工艺和掩膜，减少阴影效应和增强强度公开(公告)号：US20150147687A1
公开(公告)日：2015-05-28
申请号：US14221555
申请日：2014-03-21
Inventor： Yen-Cheng Lu , Shinn-Sheng YU , Jeng-Horng CHEN , Anthony YEN
CPC classification number: G03F1/24 , G03F1/22 , G03F1/26 , G03F1/36 , G03F1/76 , G03F7/2002 , G03F7/2004
Abstract: The present disclosure provides one embodiment of an extreme ultraviolet (EUV) mask. The EUV mask includes a first state and a second state different from each other; a first main polygon and a second main polygon adjacent to the first main polygon; a plurality of sub-resolution assist polygons; and a field. Each of the first and second main polygons, the sub-resolution assist polygons, and the field has an associated state. The state assigned to the first main polygon is different from the state assigned to the second main polygon. The plurality of assist polygons are assigned a same state, which is different from a state assigned to the field.
Abstract translation: 本公开提供了一种极紫外（EUV）掩模的实施方案。 EUV掩模包括彼此不同的第一状态和第二状态; 与第一主多边形相邻的第一主多边形和第二主多边形; 多个分解辅助多边形; 和一个领域。 第一和第二主多边形，子分辨率辅助多边形和场中的每一个具有相关联的状态。 分配给第一主多边形的状态与分配给第二主多边形的状态不同。 多个辅助多边形被分配与分配给该场的状态不同的相同状态。
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公开(公告)号：US20150085268A1
公开(公告)日：2015-03-26
申请号：US14032457
申请日：2013-09-20
Inventor： Yen-Cheng LU , Shinn-Sheng YU , Jeng-Horng CHEN , Anthony YEN
Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. an extreme ultraviolet lithography (EUVL) system includes an extreme ultraviolet (EUV) reflection-type mask having a patterned flare-suppressing-by-phase-shifting (FSbPhS) layer disposed over a patterned absorption layer. The system also includes a radiation to expose the EUV mask and a projection optics box (POB) to collect and direct the radiation that reflects from the EUV mask to expose a target.
Abstract translation: 公开了一种极紫外光刻（EUVL）系统。 极紫外光刻（EUVL）系统包括极化紫外（EUV）反射型掩模，其具有设置在图案化吸收层上方的图案化阻止逐相移位（FSbPhS）层。 该系统还包括用于暴露EUV掩模的辐射和用于收集和引导从EUV掩模反射的辐射以暴露目标的投影光学盒（POB）。
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