公开(公告)号：US12074193B2

公开(公告)日：2024-08-27

申请号：US18193544

申请日：2023-03-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chi-Cheng Chen ,  Wei-Li Huang ,  Chun-Yi Wu ,  Kuang-Yi Wu ,  Hon-Lin Huang ,  Chih-Hung Su ,  Chin-Yu Ku ,  Chen-Shien Chen

IPC: H01L23/31 ,  H01F41/04 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532 ,  H01L49/02

CPC classification number: H01L28/10 ,  H01F41/046 ,  H01L21/76823 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/53204 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.

公开(公告)号：US11942398B2

公开(公告)日：2024-03-26

申请号：US17461972

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ting-Li Yang ,  Wen-Hsiung Lu ,  Jhao-Yi Wang ,  Fu Wei Liu ,  Chin-Yu Ku

IPC: H01L21/76 ,  H01L21/48 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L21/76879

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

公开(公告)号：US11769716B2

公开(公告)日：2023-09-26

申请号：US17213200

申请日：2021-03-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yung-Sheng Lin ,  Cheng-Lung Yang ,  Chin-Yu Ku ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Tang-Wei Huang ,  Fu Wei Liu

IPC: H01L23/495 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49548 ,  H01L21/4821 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49565 ,  H01L23/562

Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.

公开(公告)号：US10535629B2

公开(公告)日：2020-01-14

申请号：US16229585

申请日：2018-12-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Alexander Kalnitsky ,  Yi-Yang Lei ,  Hsi-Ching Wang ,  Cheng-Yu Kuo ,  Tsung Lung Huang ,  Ching-Hua Hsieh ,  Chung-Shi Liu ,  Chen-Hua Yu ,  Chin-Yu Ku ,  De-Dui Liao ,  Kuo-Chio Liu ,  Kai-Di Wu ,  Kuo-Pin Chang ,  Sheng-Pin Yang ,  Isaac Huang

IPC: H01L21/683 ,  H01L23/00 ,  H01L21/78

Abstract: A method of manufacturing a semiconductor structure includes receiving a first substrate including an IMD layer disposed over the first substrate and a plurality of conductive bumps disposed in the IMD layer; receiving a second substrate; disposing a patterned adhesive over the first substrate, wherein at least a portion of the IMD layer is exposed through the patterned adhesive; and bonding the first substrate with the second substrate, wherein a top surface of the at least portion of the IMD layer is exposed through the patterned adhesive after bonding the first substrate with the second substrate.

公开(公告)号：US20180226342A1

公开(公告)日：2018-08-09

申请号：US15942762

申请日：2018-04-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Mirng-Ji Lii ,  Chung-Shi Liu ,  Chin-Yu Ku ,  Hung-Jui Kuo ,  Alexander Kalnitsky ,  Ming-Che Ho ,  Yi-Wen Wu ,  Ching-Hui Chen ,  Kuo-Chio Liu

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/31 ,  H01L23/528 ,  H01L23/00 ,  H01L21/48 ,  H01L23/532

Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.

公开(公告)号：US20240014105A1

公开(公告)日：2024-01-11

申请号：US18472239

申请日：2023-09-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yung-Sheng Lin ,  Cheng-Lung Yang ,  Chin-Yu Ku ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Tang-Wei Huang ,  Fu Wei Liu

IPC: H01L23/495 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49548 ,  H01L23/481 ,  H01L21/76898 ,  H01L23/49565 ,  H01L21/4821 ,  H01L23/562

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.

公开(公告)号：US10741513B2

公开(公告)日：2020-08-11

申请号：US16226173

申请日：2018-12-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC: H01L23/00 ,  C25D5/50 ,  C25D17/12 ,  C25D5/12 ,  C25D17/00 ,  C25D7/12 ,  C25D21/10 ,  H01L23/31 ,  C25D3/12 ,  C25D3/38 ,  C25D3/60

Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US10700001B2

公开(公告)日：2020-06-30

申请号：US15942762

申请日：2018-04-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Mirng-Ji Lii ,  Chung-Shi Liu ,  Chin-Yu Ku ,  Hung-Jui Kuo ,  Alexander Kalnitsky ,  Ming-Che Ho ,  Yi-Wen Wu ,  Ching-Hui Chen ,  Kuo-Chio Liu

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532

Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.

公开(公告)号：US10269703B2

公开(公告)日：2019-04-23

申请号：US15434644

申请日：2017-02-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chin-Yu Ku ,  Sheng-Pin Yang ,  Chen-Shien Chen ,  Hon-Lin Huang ,  Chien-Chih Chou ,  Ting-Li Yang

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes: a first conductive line disposed on a substrate, a second conductive line disposed on the substrate, and the second conductive line separated with the first conductive line by a trench; an insulating layer disposed on the first conductive line and the second conductive line, and filled the trench between the first conductive line and the second conductive line; and a magnetic film having a first surface and a second surface opposite to the first surface, and the first surface disposed on the insulating layer; wherein the first surface has a first concave directly above the trench, and the first concave has a first obtuse angle of at least 170 degree.

公开(公告)号：US10163849B2

公开(公告)日：2018-12-25

申请号：US15790749

申请日：2017-10-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Alexander Kalnitsky ,  Yi-Yang Lei ,  Hsi-Ching Wang ,  Cheng-Yu Kuo ,  Tsung Lung Huang ,  Ching-Hua Hsieh ,  Chung-Shi Liu ,  Chen-Hua Yu ,  Chin-Yu Ku ,  De-Dui Liao ,  Kuo-Chio Liu ,  Kai-Di Wu ,  Kuo-Pin Chang ,  Sheng-Pin Yang ,  Isaac Huang

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/683

Abstract: A method of manufacturing a semiconductor structure, including receiving a first substrate including a plurality of conductive bumps disposed over the first substrate; receiving a second substrate; disposing an adhesive over the first substrate; removing a portion of the adhesive to expose at least one of the plurality of conductive bumps; and bonding the first substrate with the second substrate.